Hardware acceleration is an essential technique for extracting and tracking moving objects in real time. It is desirable to design tracking algorithms such that they are applicable for parallel computations on hardware. Exclusive block matching methods are designed for hardware implementation, and they can realize detailed motion extraction as well as robust moving object tracking. In this study, we develop tracking hardware based on an exclusive block matching method on FPGA. This tracking hardware is based on a two-dimensional systolic array architecture, and can realize robust moving object extraction and tracking at more than 100 fps for QVGA images using the high parallelism of an exclusive block matching method, synchronous shift data transfer, and special circuits to accelerate searching the exclusive correspondence of blocks.
Yoichi TOMIOKA
Tokyo University of Agriculture and Technology
Ryota TAKASU
Tokyo University of Agriculture and Technology
Takashi AOKI
NTT Corporation
Eiichi HOSOYA
NTT Corporation
Hitoshi KITAZAWA
Tokyo University of Agriculture and Technology
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Yoichi TOMIOKA, Ryota TAKASU, Takashi AOKI, Eiichi HOSOYA, Hitoshi KITAZAWA, "FPGA Implementation of Exclusive Block Matching for Robust Moving Object Extraction and Tracking" in IEICE TRANSACTIONS on Information,
vol. E97-D, no. 3, pp. 573-582, March 2014, doi: 10.1587/transinf.E97.D.573.
Abstract: Hardware acceleration is an essential technique for extracting and tracking moving objects in real time. It is desirable to design tracking algorithms such that they are applicable for parallel computations on hardware. Exclusive block matching methods are designed for hardware implementation, and they can realize detailed motion extraction as well as robust moving object tracking. In this study, we develop tracking hardware based on an exclusive block matching method on FPGA. This tracking hardware is based on a two-dimensional systolic array architecture, and can realize robust moving object extraction and tracking at more than 100 fps for QVGA images using the high parallelism of an exclusive block matching method, synchronous shift data transfer, and special circuits to accelerate searching the exclusive correspondence of blocks.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E97.D.573/_p
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@ARTICLE{e97-d_3_573,
author={Yoichi TOMIOKA, Ryota TAKASU, Takashi AOKI, Eiichi HOSOYA, Hitoshi KITAZAWA, },
journal={IEICE TRANSACTIONS on Information},
title={FPGA Implementation of Exclusive Block Matching for Robust Moving Object Extraction and Tracking},
year={2014},
volume={E97-D},
number={3},
pages={573-582},
abstract={Hardware acceleration is an essential technique for extracting and tracking moving objects in real time. It is desirable to design tracking algorithms such that they are applicable for parallel computations on hardware. Exclusive block matching methods are designed for hardware implementation, and they can realize detailed motion extraction as well as robust moving object tracking. In this study, we develop tracking hardware based on an exclusive block matching method on FPGA. This tracking hardware is based on a two-dimensional systolic array architecture, and can realize robust moving object extraction and tracking at more than 100 fps for QVGA images using the high parallelism of an exclusive block matching method, synchronous shift data transfer, and special circuits to accelerate searching the exclusive correspondence of blocks.},
keywords={},
doi={10.1587/transinf.E97.D.573},
ISSN={1745-1361},
month={March},}
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TY - JOUR
TI - FPGA Implementation of Exclusive Block Matching for Robust Moving Object Extraction and Tracking
T2 - IEICE TRANSACTIONS on Information
SP - 573
EP - 582
AU - Yoichi TOMIOKA
AU - Ryota TAKASU
AU - Takashi AOKI
AU - Eiichi HOSOYA
AU - Hitoshi KITAZAWA
PY - 2014
DO - 10.1587/transinf.E97.D.573
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E97-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2014
AB - Hardware acceleration is an essential technique for extracting and tracking moving objects in real time. It is desirable to design tracking algorithms such that they are applicable for parallel computations on hardware. Exclusive block matching methods are designed for hardware implementation, and they can realize detailed motion extraction as well as robust moving object tracking. In this study, we develop tracking hardware based on an exclusive block matching method on FPGA. This tracking hardware is based on a two-dimensional systolic array architecture, and can realize robust moving object extraction and tracking at more than 100 fps for QVGA images using the high parallelism of an exclusive block matching method, synchronous shift data transfer, and special circuits to accelerate searching the exclusive correspondence of blocks.
ER -