In this paper we discuss a fall-safe of an asynchronous sequential machine. Though several methods have already been reported on the realization of the fail-safe circuit, we can find advantages of the method explained in this paper in the following points: First the state transition function in the form of an ON-SET function, second the consideration for a masked-fault. In order to realize the state transition function only by ON-SET functions, the delay circuit is inserted into input circuit and the input for one state transition is re-formed into two parts. It is reported that a guarantee against a masked-fault is easily attained because of ON-SET realization. In the method described in this paper the state assignment of the input and of the excitation circuit adopt the constant weight equidistant codes and the circuit is guaranteed to be rece-free. By this method the circuit can be operated with the guaranty of a fail-safe even if masked-faults exist.
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Hiroshi MASUYAMA, Noriyoshi YOSHIDA, "Design of Fail-Safe Asynchronous Sequential Machine" in IEICE TRANSACTIONS on transactions,
vol. E60-E, no. 10, pp. 527-532, October 1977, doi: .
Abstract: In this paper we discuss a fall-safe of an asynchronous sequential machine. Though several methods have already been reported on the realization of the fail-safe circuit, we can find advantages of the method explained in this paper in the following points: First the state transition function in the form of an ON-SET function, second the consideration for a masked-fault. In order to realize the state transition function only by ON-SET functions, the delay circuit is inserted into input circuit and the input for one state transition is re-formed into two parts. It is reported that a guarantee against a masked-fault is easily attained because of ON-SET realization. In the method described in this paper the state assignment of the input and of the excitation circuit adopt the constant weight equidistant codes and the circuit is guaranteed to be rece-free. By this method the circuit can be operated with the guaranty of a fail-safe even if masked-faults exist.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e60-e_10_527/_p
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@ARTICLE{e60-e_10_527,
author={Hiroshi MASUYAMA, Noriyoshi YOSHIDA, },
journal={IEICE TRANSACTIONS on transactions},
title={Design of Fail-Safe Asynchronous Sequential Machine},
year={1977},
volume={E60-E},
number={10},
pages={527-532},
abstract={In this paper we discuss a fall-safe of an asynchronous sequential machine. Though several methods have already been reported on the realization of the fail-safe circuit, we can find advantages of the method explained in this paper in the following points: First the state transition function in the form of an ON-SET function, second the consideration for a masked-fault. In order to realize the state transition function only by ON-SET functions, the delay circuit is inserted into input circuit and the input for one state transition is re-formed into two parts. It is reported that a guarantee against a masked-fault is easily attained because of ON-SET realization. In the method described in this paper the state assignment of the input and of the excitation circuit adopt the constant weight equidistant codes and the circuit is guaranteed to be rece-free. By this method the circuit can be operated with the guaranty of a fail-safe even if masked-faults exist.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - Design of Fail-Safe Asynchronous Sequential Machine
T2 - IEICE TRANSACTIONS on transactions
SP - 527
EP - 532
AU - Hiroshi MASUYAMA
AU - Noriyoshi YOSHIDA
PY - 1977
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E60-E
IS - 10
JA - IEICE TRANSACTIONS on transactions
Y1 - October 1977
AB - In this paper we discuss a fall-safe of an asynchronous sequential machine. Though several methods have already been reported on the realization of the fail-safe circuit, we can find advantages of the method explained in this paper in the following points: First the state transition function in the form of an ON-SET function, second the consideration for a masked-fault. In order to realize the state transition function only by ON-SET functions, the delay circuit is inserted into input circuit and the input for one state transition is re-formed into two parts. It is reported that a guarantee against a masked-fault is easily attained because of ON-SET realization. In the method described in this paper the state assignment of the input and of the excitation circuit adopt the constant weight equidistant codes and the circuit is guaranteed to be rece-free. By this method the circuit can be operated with the guaranty of a fail-safe even if masked-faults exist.
ER -