IEICE TRANSACTIONS on transactions
Parallel Processing of the FFT by an Array Processor
Summary :
In this research, design concepts of a parallel processing oriented FFT processor are suggested. Problems of previous FFT harware and previous FFT algorithms are pointed out in the aspect of parallelism in the FFT. Solving such problems, an array hardware structure for parallel processing in butterfly operations is proposed, and a two-dimensional FFT algorithm for parallel processing in data permutations is also proposed. The new FFT algorithm derived from a two-dimensional Fourier transform permits a data permutation by the exchange of butterfly algorithms. The proposed array structure and the algorithm provide highly parallel processing suited for high speed FFT on a large number of data, and eliminate hardware for butterflying and data permutating.
- Publication
- IEICE TRANSACTIONS on transactions Vol.E61-E No.2 pp.65-72
- Publication Date
- 1978/02/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Computers
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Hideki MORI, Hideo AISO, "Parallel Processing of the FFT by an Array Processor" in IEICE TRANSACTIONS on transactions,
vol. E61-E, no. 2, pp. 65-72, February 1978, doi: .
Abstract: In this research, design concepts of a parallel processing oriented FFT processor are suggested. Problems of previous FFT harware and previous FFT algorithms are pointed out in the aspect of parallelism in the FFT. Solving such problems, an array hardware structure for parallel processing in butterfly operations is proposed, and a two-dimensional FFT algorithm for parallel processing in data permutations is also proposed. The new FFT algorithm derived from a two-dimensional Fourier transform permits a data permutation by the exchange of butterfly algorithms. The proposed array structure and the algorithm provide highly parallel processing suited for high speed FFT on a large number of data, and eliminate hardware for butterflying and data permutating.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e61-e_2_65/_p
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@ARTICLE{e61-e_2_65,
author={Hideki MORI, Hideo AISO, },
journal={IEICE TRANSACTIONS on transactions},
title={Parallel Processing of the FFT by an Array Processor},
year={1978},
volume={E61-E},
number={2},
pages={65-72},
abstract={In this research, design concepts of a parallel processing oriented FFT processor are suggested. Problems of previous FFT harware and previous FFT algorithms are pointed out in the aspect of parallelism in the FFT. Solving such problems, an array hardware structure for parallel processing in butterfly operations is proposed, and a two-dimensional FFT algorithm for parallel processing in data permutations is also proposed. The new FFT algorithm derived from a two-dimensional Fourier transform permits a data permutation by the exchange of butterfly algorithms. The proposed array structure and the algorithm provide highly parallel processing suited for high speed FFT on a large number of data, and eliminate hardware for butterflying and data permutating.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - Parallel Processing of the FFT by an Array Processor
T2 - IEICE TRANSACTIONS on transactions
SP - 65
EP - 72
AU - Hideki MORI
AU - Hideo AISO
PY - 1978
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E61-E
IS - 2
JA - IEICE TRANSACTIONS on transactions
Y1 - February 1978
AB - In this research, design concepts of a parallel processing oriented FFT processor are suggested. Problems of previous FFT harware and previous FFT algorithms are pointed out in the aspect of parallelism in the FFT. Solving such problems, an array hardware structure for parallel processing in butterfly operations is proposed, and a two-dimensional FFT algorithm for parallel processing in data permutations is also proposed. The new FFT algorithm derived from a two-dimensional Fourier transform permits a data permutation by the exchange of butterfly algorithms. The proposed array structure and the algorithm provide highly parallel processing suited for high speed FFT on a large number of data, and eliminate hardware for butterflying and data permutating.
ER -
English
