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MOS Integrated-Circuits with Ion-Implanted Polysilicon Resistor Load

Takashi OHZONE, Takashi HIRAO, Shiro HORIUCHI, Hideo HOZUMI

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Summary :

The features of n-channel polysilicon-gate MOS integrated circuits with ion-implanted polysilicon resistor load are described. A ring-oscillator circuit and a divider circuit are used for the performance evaluations. Switching delay time of 1.0 ns and power-delay product as small as 0.1 pJ are obtained at 2V supply voltage for the ring-oscillator. In a divider circuit, input frequency up to 80 MHz can be divided at 2V. The electrical characteristics can be varied by changing sheet resistance of the load resistors, while the power-delay product are nearly constant. Based on the experimental results, electrical characteristics of resistor load MOS circuits using the scaled-down MOS FET's are discussed.

Publication
IEICE TRANSACTIONS on transactions Vol.E63-E No.11 pp.803-806
Publication Date
1980/11/25
Publicized
Online ISSN
DOI
Type of Manuscript
PAPER
Category
Integrated Circuits

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