IEICE TRANSACTIONS on transactions
Analysis of an Access Contention Model in a Multiprocessor-Controlled Switching System
Summary :
This paper presents a queueing network model for common memory access contention and access contention to common data that cannot be referenced by more than one processor in a multiprocessor-controlled switching system. The model takes into account the inter-dependence between these types of access contention, which is important for evaluating the performance of a single-bus multiprocessor system. Although this inter-dependence is incorporated into the queueing network model, an exact analysis is difficult. Therefore, an approximate analysis method is proposed based on decomposing the model into two submodels. Approximate analysis results are compared with simulation results and it is shown that the approximation method provides sufficient approximate values. This queuing network model is useful for estimating the call processing capacity of a multiprocessor-controlled switching system.
- Publication
- IEICE TRANSACTIONS on transactions Vol.E68-E No.12 pp.824-830
- Publication Date
- 1985/12/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Switching Systems
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Shuichi SUMITA, "Analysis of an Access Contention Model in a Multiprocessor-Controlled Switching System" in IEICE TRANSACTIONS on transactions,
vol. E68-E, no. 12, pp. 824-830, December 1985, doi: .
Abstract: This paper presents a queueing network model for common memory access contention and access contention to common data that cannot be referenced by more than one processor in a multiprocessor-controlled switching system. The model takes into account the inter-dependence between these types of access contention, which is important for evaluating the performance of a single-bus multiprocessor system. Although this inter-dependence is incorporated into the queueing network model, an exact analysis is difficult. Therefore, an approximate analysis method is proposed based on decomposing the model into two submodels. Approximate analysis results are compared with simulation results and it is shown that the approximation method provides sufficient approximate values. This queuing network model is useful for estimating the call processing capacity of a multiprocessor-controlled switching system.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e68-e_12_824/_p
Copy
@ARTICLE{e68-e_12_824,
author={Shuichi SUMITA, },
journal={IEICE TRANSACTIONS on transactions},
title={Analysis of an Access Contention Model in a Multiprocessor-Controlled Switching System},
year={1985},
volume={E68-E},
number={12},
pages={824-830},
abstract={This paper presents a queueing network model for common memory access contention and access contention to common data that cannot be referenced by more than one processor in a multiprocessor-controlled switching system. The model takes into account the inter-dependence between these types of access contention, which is important for evaluating the performance of a single-bus multiprocessor system. Although this inter-dependence is incorporated into the queueing network model, an exact analysis is difficult. Therefore, an approximate analysis method is proposed based on decomposing the model into two submodels. Approximate analysis results are compared with simulation results and it is shown that the approximation method provides sufficient approximate values. This queuing network model is useful for estimating the call processing capacity of a multiprocessor-controlled switching system.},
keywords={},
doi={},
ISSN={},
month={December},}
Copy
TY - JOUR
TI - Analysis of an Access Contention Model in a Multiprocessor-Controlled Switching System
T2 - IEICE TRANSACTIONS on transactions
SP - 824
EP - 830
AU - Shuichi SUMITA
PY - 1985
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E68-E
IS - 12
JA - IEICE TRANSACTIONS on transactions
Y1 - December 1985
AB - This paper presents a queueing network model for common memory access contention and access contention to common data that cannot be referenced by more than one processor in a multiprocessor-controlled switching system. The model takes into account the inter-dependence between these types of access contention, which is important for evaluating the performance of a single-bus multiprocessor system. Although this inter-dependence is incorporated into the queueing network model, an exact analysis is difficult. Therefore, an approximate analysis method is proposed based on decomposing the model into two submodels. Approximate analysis results are compared with simulation results and it is shown that the approximation method provides sufficient approximate values. This queuing network model is useful for estimating the call processing capacity of a multiprocessor-controlled switching system.
ER -
English
