IEICE TRANSACTIONS on transactions
The Least-Fixed-Point of Feedback-Loops of Logic Circuits for a Set of Input Strings
Summary :
This paper discuses the simulation of logic circuits with feedback loops for a set of input strings. Logic circuits are modeled as Mealy machines which convert an input string set to an output string set. By the simulation, we obtain a set of output strings which shows the input-output relation of the simulated circuit. The behavior of feedback loops of a logic circuit is shown to be the least-fixed-point on a lattice of string sets. The characteristics of a lattice we have used is also shown in the paper.
- Publication
- IEICE TRANSACTIONS on transactions Vol.E72-E No.12 pp.1344-1349
- Publication Date
- 1989/12/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on the 2nd Karuizawa Workshop on Circuits and Systems)
- Category
- VLSI Design Technology
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Shinji KIMURA, Hiromasa HANEDA, "The Least-Fixed-Point of Feedback-Loops of Logic Circuits for a Set of Input Strings" in IEICE TRANSACTIONS on transactions,
vol. E72-E, no. 12, pp. 1344-1349, December 1989, doi: .
Abstract: This paper discuses the simulation of logic circuits with feedback loops for a set of input strings. Logic circuits are modeled as Mealy machines which convert an input string set to an output string set. By the simulation, we obtain a set of output strings which shows the input-output relation of the simulated circuit. The behavior of feedback loops of a logic circuit is shown to be the least-fixed-point on a lattice of string sets. The characteristics of a lattice we have used is also shown in the paper.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e72-e_12_1344/_p
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@ARTICLE{e72-e_12_1344,
author={Shinji KIMURA, Hiromasa HANEDA, },
journal={IEICE TRANSACTIONS on transactions},
title={The Least-Fixed-Point of Feedback-Loops of Logic Circuits for a Set of Input Strings},
year={1989},
volume={E72-E},
number={12},
pages={1344-1349},
abstract={This paper discuses the simulation of logic circuits with feedback loops for a set of input strings. Logic circuits are modeled as Mealy machines which convert an input string set to an output string set. By the simulation, we obtain a set of output strings which shows the input-output relation of the simulated circuit. The behavior of feedback loops of a logic circuit is shown to be the least-fixed-point on a lattice of string sets. The characteristics of a lattice we have used is also shown in the paper.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - The Least-Fixed-Point of Feedback-Loops of Logic Circuits for a Set of Input Strings
T2 - IEICE TRANSACTIONS on transactions
SP - 1344
EP - 1349
AU - Shinji KIMURA
AU - Hiromasa HANEDA
PY - 1989
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E72-E
IS - 12
JA - IEICE TRANSACTIONS on transactions
Y1 - December 1989
AB - This paper discuses the simulation of logic circuits with feedback loops for a set of input strings. Logic circuits are modeled as Mealy machines which convert an input string set to an output string set. By the simulation, we obtain a set of output strings which shows the input-output relation of the simulated circuit. The behavior of feedback loops of a logic circuit is shown to be the least-fixed-point on a lattice of string sets. The characteristics of a lattice we have used is also shown in the paper.
ER -
English
