This paper describes a segment driver IC for high-quality liquid-crystal-displays (LCDs). Major design issues in the segment driver IC are a wide signal bandwidth and excessive output-offset variation both within a chip and between chips. After clarifying the trade-off relation between the signal bandwidth and the output-offset variation originated from conventional sample-and-hold (S/H) circuits, two wide-band S/H circuits with low output-offset variation have been introduced. The basic ideas for the proposed S/H circuits are to improve timing of the sampling pulses applied to MOS analog switches and to prevent channel charge injection onto a storage capacitor when the switches turn off. The inter-chip offset-cancellation technique has been also introduced by using an additional S/H circuit. Two test chips were implemented using the above S/H circuits for demonstration purposes. The intra-chip output-offset standard deviation of 9.5 mVrms with a 3dB bandwidth of 50 MHz was achieved. The inter-chip output-offset standard deviation was reduced to 5.1 mVrms by using the inter-chip offset-cancellation technique. The evaluation of picture quality of an LCD using the chips shows the applicability of the proposed approaches to displays used for multimedia applications.

This paper examines the design considerations for an opamp to be used in a low-power consumption LCD driver IC: (1) slew rate enhancement suitable for a rail-to-rail input stage; (2) improved phase compensation with reduced compensation capacitance; and (3) limitation of instantaneous current consumption. The experimental results support our opamp design approach and indicate the feasibility of a 10 µA quiescent current opamp.

An LCD Driver IC includes more than 300 buffer amplifiers on a single chip. The phase compensation capacitors (on-chip Miller capacitors) for the amplifiers are more than 1000 pF and occupy a large chip area. This paper describes a two-gain-stage amplifier in which an on-chip Miller capacitor is not used for phase compensation in an LCD Driver IC. In the proposed amplifier, phase compensation is achieved only by a newly introduced zero, which is formed by the load capacitance and a phase compensation resistor connected between the output of the amplifier and the capacitive load. Designs of the phase compensation resistor and the amplifier before compensation are discussed, considering a typical load capacitance range. The test chip was fabricated. The newly introduced zero successfully stabilized the amplifier. The chip area for the amplifier was reduced by 30-40%, compared with our previously reported one. The current consumption of the amplifier was only 5 µA. The experimental results of the fabricated test chip support that the proposed amplifier is suitable to an LCD driver IC with a smaller chip area.