Fully integrated CMOS power amplifiers (PAs) with a two-winding and single-winding combined transformer (TS transformer) are presented. The general analysis of the TS transformer and other power-combining transformers, i.e., the series-combining transformer and parallel-combining transformer, is presented in terms of the transformer design parameters. Compared with other power-combining transformers, the proposed power-combining TS transformer offers high-efficiency with a compact form factor. In addition, a fully integrated CMOS PA using the TS transformer with multi-gated transistors (MGTRs) and adaptive bias circuit has been proposed to improve linearity. The proposed PAs are implemented using 65-nm CMOS technology. The implemented PA with the TS transformer achieves a saturated output power of 26.7 dBm with drain efficiency (DE) of 47.7%. The PA achieves 20.13-dBm output power with 21.4% DE while satisfying the -25-dB error vector magnitude (EVM) requirement when tested with the WLAN 802.11g signal. The implemented PA using the TS transformer with MGTRs and adaptive bias circuit achieves the -30-dB EVM requirement up to an output power of 17.13 dBm with 10.43% DE when tested using the WLAN 802.11ac signal.