1-2hit |
Jai-Sop HYUN Kwang Sub YOON Jiseung NAM
A 3V-50 MHz analog CMOS current-mode continuous-time active filter with a negative resistance load (NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. The inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5 µm CMOS n-well process. Simulation result shows the cutoff frequency of 50 MHz and power consumption of 2.4mW/pole with a 3V power supply.
A design methodology of the analog currentmode bandwidth programmable integrator for a low voltage (3V) and low power application is developed and the integrator designed by this method is successfully fabricated by a 0.8µm CMOS n-well single poly/double metal process. The integrator ocuppies the active chip area of 0.3mm2. The experimental result illustrates a low power dissipation (1.0mW-3.55mW), 65dB of the dynamic range, and bandwidth programmability (10MHz-30MHz) with an external digital 4bit.