A 3V-50MHz Analog CMOS Current-Mode High Frequency Filter with a Negative Resistance Load

Jai-Sop HYUN; Kwang Sub YOON; Jiseung NAM

A 3V-50MHz Analog CMOS Current-Mode High Frequency Filter with a Negative Resistance Load

Jai-Sop HYUN, Kwang Sub YOON, Jiseung NAM

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A 3V-50 MHz analog CMOS current-mode continuous-time active filter with a negative resistance load (NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. The inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5 µm CMOS n-well process. Simulation result shows the cutoff frequency of 50 MHz and power consumption of 2.4mW/pole with a 3V power supply.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E79-A No.12 pp.2112-2116

Publication Date: 1996/12/25

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Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)

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Jai-Sop HYUN, Kwang Sub YOON, Jiseung NAM, "A 3V-50MHz Analog CMOS Current-Mode High Frequency Filter with a Negative Resistance Load" in IEICE TRANSACTIONS on Fundamentals, vol. E79-A, no. 12, pp. 2112-2116, December 1996, doi: .
Abstract: A 3V-50 MHz analog CMOS current-mode continuous-time active filter with a negative resistance load (NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. The inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5 µm CMOS n-well process. Simulation result shows the cutoff frequency of 50 MHz and power consumption of 2.4mW/pole with a 3V power supply.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e79-a_12_2112/_p

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@ARTICLE{e79-a_12_2112,
author={Jai-Sop HYUN, Kwang Sub YOON, Jiseung NAM, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A 3V-50MHz Analog CMOS Current-Mode High Frequency Filter with a Negative Resistance Load},
year={1996},
volume={E79-A},
number={12},
pages={2112-2116},
abstract={A 3V-50 MHz analog CMOS current-mode continuous-time active filter with a negative resistance load (NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. The inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5 µm CMOS n-well process. Simulation result shows the cutoff frequency of 50 MHz and power consumption of 2.4mW/pole with a 3V power supply.},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - A 3V-50MHz Analog CMOS Current-Mode High Frequency Filter with a Negative Resistance Load
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2112
EP - 2116
AU - Jai-Sop HYUN
AU - Kwang Sub YOON
AU - Jiseung NAM
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E79-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 1996
AB - A 3V-50 MHz analog CMOS current-mode continuous-time active filter with a negative resistance load (NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. The inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5 µm CMOS n-well process. Simulation result shows the cutoff frequency of 50 MHz and power consumption of 2.4mW/pole with a 3V power supply.
ER -