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Seon Hwan KIM Ju Hee CHOI Jong Wook KWAK
In this letter, we propose a novel garbage collection technique for index structures based on flash memory systems, called Proxy Block-based Garbage Collection (PBGC). Many index structures have been proposed for flash memory systems. They exploit buffers and logs to resolve the update propagation problem, one of the a main cause of performance degradation of the index structures. However, these studies overlooked the fact that not only the record operation but also garbage collection induces the update propagation problem. The proposal, PBGC, exploits a proxy block and a block mapping table to solve the update propagation problem, which is caused by the changes in the page and block caused by garbage collection. Experiments show that PBGC decreased the execution time of garbage collection by up to 39%, compared with previous garbage collection techniques.
Ju Hee CHOI Jong Wook KWAK Chu Shik JHON
Non-Volatile Memories (NVMs) are considered as promising memory technologies for Last-Level Cache (LLC) due to their low leakage and high density. However, NVMs have some drawbacks such as high dynamic energy in modifying NVM cells, long latency for write operation, and limited write endurance. A number of approaches have been proposed to overcome these drawbacks. But very little attention is paid to consider the cache coherency issue. In this letter, we suggest a new cache coherence protocol to reduce the write operations of the LLC. In our protocol, the block data of the LLC is updated only if the cache block is written-back from a private cache, which leads to avoiding useless write operations in the LLC. The simulation results show that our protocol provides 27.1% energy savings and 26.3% lifetime improvements in STT-RAM at maximum.
Sang-Ho HWANG Ju Hee CHOI Jong Wook KWAK
In this letter, we propose a garbage collection technique for non-volatile memory systems, called Migration Cost Sensitive Garbage Collection (MCSGC). Considering the migration overhead from selecting victim blocks, MCSGC increases the lifetime of memory systems and improves response time in garbage collection. Additionally, the proposed algorithm also improves the efficiency of garbage collection by separating cold data from hot data in valid pages. In the experimental evaluation, we show that MCSGC yields up to a 82% improvement in lifetime prolongation, compared with existing garbage collection, and it also reduces erase and migration operations by up to 30% and 29%, respectively.
Seon Hwan KIM Ju Hee CHOI Jong Wook KWAK
In this letter, we propose a novel wear leveling technique we call Hidden cold block-aware Wear Leveling (HaWL) using a bit-set threshold. HaWL prolongs the lifetime of flash memory devices by using a bit array table in wear leveling. The bit array table saves the histories of block erasures for a period and distinguishes cold blocks from all blocks. In addition, HaWL can reduce the size of the bit array table by using a one-to-many mode, where one bit is related to many blocks. Moreover, to prevent degradation of wear leveling in the one-to-many mode, HaWL uses bit-set threshold (BST) and increases the accuracy of the cold block information. The performance results illustrate that HaWL prolongs the lifetime of flash memory by up to 48% compared with previous wear leveling techniques in our experiments.
Ju Hee CHOI Jong Wook KWAK Seong Tae JHANG Chu Shik JHON
Filter caches have been studied as an energy efficient solution. They achieve energy savings via selected access to L1 cache, but severely decrease system performance. Therefore, a filter cache system should adopt components that balance execution delay against energy savings. In this letter, we analyze the legacy filter cache system and propose Data Filter Cache with Partial Tag Cache (DFPC) as a new solution. The proposed DFPC scheme reduces energy consumption of L1 data cache and does not impair system performance at all. Simulation results show that DFPC provides the 46.36% energy savings without any performance loss.
Seon Hwan KIM Ju Hee CHOI Jong Wook KWAK
In this letter, we propose a round robin-based wear leveling (RRWL) for flash memory systems. RRWL uses a block erase table (BET), which is composed of a bit array and saves the erasure histories of blocks. BET can use one-to-one mode to increase the performance of wear leveling or one-to-many mode to reduce memory consumption. However, one-to-many mode decreases the accuracy of cold block information, which results in the lifetime degradation of flash memory. To solve this problem, RRWL consistently uses one-to-one mode based on round robin method to increase the accuracy of cold block identification, with reduced memory size of BET, like in one-to-many mode. Experiments show that RRWL increases the lifetime of flash memory by up to 47% and 14%, compared with BET and HaWL, respectively.