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Data Filter Cache with Partial Tag Matching for Low Power Embedded Processor

Ju Hee CHOI, Jong Wook KWAK, Seong Tae JHANG, Chu Shik JHON

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Summary :

Filter caches have been studied as an energy efficient solution. They achieve energy savings via selected access to L1 cache, but severely decrease system performance. Therefore, a filter cache system should adopt components that balance execution delay against energy savings. In this letter, we analyze the legacy filter cache system and propose Data Filter Cache with Partial Tag Cache (DFPC) as a new solution. The proposed DFPC scheme reduces energy consumption of L1 data cache and does not impair system performance at all. Simulation results show that DFPC provides the 46.36% energy savings without any performance loss.

Publication
IEICE TRANSACTIONS on Information Vol.E97-D No.4 pp.972-975
Publication Date
2014/04/01
Publicized
Online ISSN
1745-1361
DOI
10.1587/transinf.E97.D.972
Type of Manuscript
LETTER
Category
Computer System

Authors

Ju Hee CHOI
  Seoul National University
Jong Wook KWAK
  Yeungnam University
Seong Tae JHANG
  The University of Suwon
Chu Shik JHON
  Seoul National University

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