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[Author] Kazuaki UJIIE(1hit)

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  • A 3 Volt 1 Mbit Full-Featured EEPROM Using a Highly-Reliable MONOS Device Technology

    Shin-ichi MINAMI  Kazuaki UJIIE  Masaaki TERASAWA  Kazuhiro KOMORI  Kazunori FURUSAWA  Yoshiaki KAMIGAKI  

     
    PAPER-Non-volatile Memory

      Vol:
    E77-C No:8
      Page(s):
    1260-1269

    A low-voltage operation and highly-reliable nonvoltatile semiconductor memory with a large capacity has been manufactured using 0.8-µm CMOS technology. This 3-volt, 1-Mbit, full-featured MONOS EEPROM has a chip size of 51.3 mm2 and a memory cell size of 23.1µm2. An asymmetric programming voltage method fully exploits the abilities of the MONOS device and provides 10-year data retention after 106 erase/write cycles. Because of its wide-margin circuit design, this EEPROM can also be operated at 5 volts. High-speed read out is provided by using the polycide word line and the differential sense amplifier with a MONOS dummy memory. New functions such as data protection with software and programming-end indication with a toggle bit are added, and chips are TSOP packaged for use in many kinds of portable equipment.