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[Author] Ken UENO(4hit)

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  • High-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair

    Shin'ichi ASAI  Ken UENO  Tetsuya ASAI  Yoshihito AMEMIYA  

     
    PAPER

      Vol:
    E93-C No:6
      Page(s):
    741-746

    We propose a CMOS circuit that can be used as an equivalent to resistors. This circuit uses a simple differential pair with diode-connected MOSFETs and operates as a high-resistance resistor when driven in the subthreshold region of MOSFETs. Its resistance can be controlled in a range of 1-1000 MΩ by adjusting a tail current for the differential pair. The results of device fabrication with a 0.35-µm 2P-4M CMOS process technology is described. The resistance was 13 MΩ for a tail current of 10 nA and 135 MΩ for 1 nA. The chip area was 105 µm110 µm. Our resistor circuit is useful to construct many high-resistance resistors in a small chip area.

  • A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy

    Ken UENO  Tetsuya HIROSE  Tetsuya ASAI  Yoshihito AMEMIYA  

     
    PAPER

      Vol:
    E89-A No:4
      Page(s):
    902-907

    We developed a CMOS watchdog sensor that simulates the changes in quality of perishables such as farm and marine products. The sensor can imitate a chemical reaction that causes the changes in the quality of perishables, with a wide range of activation energy from 0.1 eV to 0.7 eV. Attached to perishable goods, the sensor simulates the deterioration of the goods caused by surrounding temperatures. By reading the output of the sensor, consumers can determine whether the goods are fresh or not. This sensor consists of subthreshold CMOS circuits with a low-power consumption of 5 µW or less.

  • An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs

    Yusuke TSUGITA  Ken UENO  Tetsuya HIROSE  Tetsuya ASAI  Yoshihito AMEMIYA  

     
    PAPER

      Vol:
    E93-C No:6
      Page(s):
    835-841

    An on-chip process, supply voltage, and temperature (PVT) compensation technique for low-voltage CMOS digital circuits was proposed. Because the degradation of circuit performance originates from the variation of the saturation current in transistors, we developed a compensation circuit consisting of a reference current that is independent of PVT variations. The circuit is operated so that the saturation current in digital circuits is equal to the reference current. The operations of the circuit were confirmed by SPICE simulation with a set of 0.35-µm standard CMOS parameters. Monte Carlo simulations showed that the proposed technique effectively improves circuit performance by 71%. The circuit is useful for on-chip compensation to mitigate the degradation of circuit performance with PVT variation in low-voltage digital circuits.

  • Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques

    Ken UENO  Tetsuya HIROSE  Tetsuya ASAI  Yoshihito AMEMIYA  

     
    LETTER-Device and Circuit Modeling and Analysis

      Vol:
    E92-A No:12
      Page(s):
    3079-3081

    A voltage-controlled oscillator (VCO) tolerant to process variations at lower supply voltage was proposed. The circuit consists of an on-chip threshold-voltage-monitoring circuit, a current-source circuit, a body- biasing control circuit, and the delay cells of the VCO. Because variations in low-voltage VCO frequency are mainly determined by that of the current in delay cells, a current-compensation technique was adopted by using an on-chip threshold-voltage-monitoring circuit and body-biasing circuit techniques. Monte Carlo SPICE simulations demonstrated that variations in the oscillation frequency by using the proposed techniques were able to be suppressed about 65% at a 1-V supply voltage, compared to frequencies with and without the techniques.