The search functionality is under construction.

Author Search Result

[Author] Kenichi KURODA(2hit)

1-2hit
  • Orbital Systolic Algorithms and Array Processors for Solution of the Algebraic Path Problem

    Stanislav G. SEDUKHIN  Toshiaki MIYAZAKI  Kenichi KURODA  

     
    PAPER-Computation and Computational Models

      Vol:
    E93-D No:3
      Page(s):
    534-541

    The algebraic path problem (APP) is a general framework which unifies several solution procedures for a number of well-known matrix and graph problems. In this paper, we present a new 3-dimensional (3-D) orbital algebraic path algorithm and corresponding 2-D toroidal array processors which solve the nn APP in the theoretically minimal number of 3n time-steps. The coordinated time-space scheduling of the computing and data movement in this 3-D algorithm is based on the modular function which preserves the main technological advantages of systolic processing: simplicity, regularity, locality of communications, pipelining, etc. Our design of the 2-D systolic array processors is based on a classical 3-D2-D space transformation. We have also shown how a data manipulation (copying and alignment) can be effectively implemented in these array processors in a massively-parallel fashion by using a matrix-matrix multiply-add operation.

  • Experimental Fabrication of Josephson Integrated Circuits

    Hajime YAMADA  Kenichi KURODA  Takao WAHO  Akira ISHIDA  

     
    PAPER-Other Devices

      Vol:
    E62-E No:11
      Page(s):
    749-753

    Improvement in circuit performance of Josephson logic devices is described and discussed. A high sensitivity switching gate of asymmetrical two junction interferometer is proposed, in which the Josephson threshold current of the junctions is unequal to each other but the bias feeding point is selected so as to balance inductance threshold current product on the left and the right hand side branch. Transmission lines with characteristic impedance as high as 4Ω were realized on a new superconducting ground plane structure with SiO2 overlying insulation. High resistivity resistor material of gold-indium alloy was also developed for resistive termination. A series-connected 4 stage OR gate chain was experimentally constructed with the present switching gates, transmission lines, and termination resistors. The circuit performance measurements demonstrated that the average speed power product was as small as 0.9 fJ per single stage.