IEICE TRANSACTIONS on transactions
Experimental Fabrication of Josephson Integrated Circuits
Summary :
Improvement in circuit performance of Josephson logic devices is described and discussed. A high sensitivity switching gate of asymmetrical two junction interferometer is proposed, in which the Josephson threshold current of the junctions is unequal to each other but the bias feeding point is selected so as to balance inductance threshold current product on the left and the right hand side branch. Transmission lines with characteristic impedance as high as 4Ω were realized on a new superconducting ground plane structure with SiO2 overlying insulation. High resistivity resistor material of gold-indium alloy was also developed for resistive termination. A series-connected 4 stage OR gate chain was experimentally constructed with the present switching gates, transmission lines, and termination resistors. The circuit performance measurements demonstrated that the average speed power product was as small as 0.9 fJ per single stage.
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- IEICE TRANSACTIONS on transactions Vol.E62-E No.11 pp.749-753
- Publication Date
- 1979/11/25
- Publicized
- Online ISSN
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- Type of Manuscript
- PAPER
- Category
- Other Devices
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Hajime YAMADA, Kenichi KURODA, Takao WAHO, Akira ISHIDA, "Experimental Fabrication of Josephson Integrated Circuits" in IEICE TRANSACTIONS on transactions,
vol. E62-E, no. 11, pp. 749-753, November 1979, doi: .
Abstract: Improvement in circuit performance of Josephson logic devices is described and discussed. A high sensitivity switching gate of asymmetrical two junction interferometer is proposed, in which the Josephson threshold current of the junctions is unequal to each other but the bias feeding point is selected so as to balance inductance threshold current product on the left and the right hand side branch. Transmission lines with characteristic impedance as high as 4Ω were realized on a new superconducting ground plane structure with SiO2 overlying insulation. High resistivity resistor material of gold-indium alloy was also developed for resistive termination. A series-connected 4 stage OR gate chain was experimentally constructed with the present switching gates, transmission lines, and termination resistors. The circuit performance measurements demonstrated that the average speed power product was as small as 0.9 fJ per single stage.
URL: https://global.ieice.org/en_transactions/transactions/10.1587/e62-e_11_749/_p
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@ARTICLE{e62-e_11_749,
author={Hajime YAMADA, Kenichi KURODA, Takao WAHO, Akira ISHIDA, },
journal={IEICE TRANSACTIONS on transactions},
title={Experimental Fabrication of Josephson Integrated Circuits},
year={1979},
volume={E62-E},
number={11},
pages={749-753},
abstract={Improvement in circuit performance of Josephson logic devices is described and discussed. A high sensitivity switching gate of asymmetrical two junction interferometer is proposed, in which the Josephson threshold current of the junctions is unequal to each other but the bias feeding point is selected so as to balance inductance threshold current product on the left and the right hand side branch. Transmission lines with characteristic impedance as high as 4Ω were realized on a new superconducting ground plane structure with SiO2 overlying insulation. High resistivity resistor material of gold-indium alloy was also developed for resistive termination. A series-connected 4 stage OR gate chain was experimentally constructed with the present switching gates, transmission lines, and termination resistors. The circuit performance measurements demonstrated that the average speed power product was as small as 0.9 fJ per single stage.},
keywords={},
doi={},
ISSN={},
month={November},}
Copy
TY - JOUR
TI - Experimental Fabrication of Josephson Integrated Circuits
T2 - IEICE TRANSACTIONS on transactions
SP - 749
EP - 753
AU - Hajime YAMADA
AU - Kenichi KURODA
AU - Takao WAHO
AU - Akira ISHIDA
PY - 1979
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E62-E
IS - 11
JA - IEICE TRANSACTIONS on transactions
Y1 - November 1979
AB - Improvement in circuit performance of Josephson logic devices is described and discussed. A high sensitivity switching gate of asymmetrical two junction interferometer is proposed, in which the Josephson threshold current of the junctions is unequal to each other but the bias feeding point is selected so as to balance inductance threshold current product on the left and the right hand side branch. Transmission lines with characteristic impedance as high as 4Ω were realized on a new superconducting ground plane structure with SiO2 overlying insulation. High resistivity resistor material of gold-indium alloy was also developed for resistive termination. A series-connected 4 stage OR gate chain was experimentally constructed with the present switching gates, transmission lines, and termination resistors. The circuit performance measurements demonstrated that the average speed power product was as small as 0.9 fJ per single stage.
ER -
English
