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[Author] Mahdi MOTTAGHI-KASHTIBAN(2hit)

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  • A Current-Mode, First-Order Takagi-Sugeno-Kang Fuzzy Logic Controller, Supporting Rational-Powered Membership Functions

    Mahdi MOTTAGHI-KASHTIBAN  Abdollah KHOEI  Khayrollah HADIDI  

     
    PAPER

      Vol:
    E90-C No:6
      Page(s):
    1258-1266

    This paper presents a new Fuzzy Logic Controller (FLC) having the ability to support rational-powered membership functions. These functions are extended forms of triangular/trapezoidal membership functions, and also those functions which are generated by applying linguistic hedges. A two-input, single-output, nine-rule Takagi-Sugeno-Kang (TSK) type FLC is designed in 0.35 µm standard CMOS technology. This controller can also be used as a standard (Mamdani) type FLC having singleton output membership functions, as well as a Linguistic Hedge FLC (LHFLC). Mixed analog/digital realization of the circuit makes the design programmable and extendable, while having relatively low power consumption. Current mode realization of the circuits leads to simple and intuitive configurations. For a particular set of programming parameters, simulation results of the controller using HSPICE simulator and level 49 parameters (BSIM3v3), show an average power consumption of 5 mW, and an RMS error of 1.32% compared to ideal results obtained from MATLAB software.

  • Modified CMOS Op-Amp with Improved Gain and Bandwidth

    Mahdi MOTTAGHI-KASHTIBAN  Khayrollah HADIDI  Abdollah KHOEI  

     
    PAPER

      Vol:
    E89-C No:6
      Page(s):
    775-780

    This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3 dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3 V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35 µm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.