IEICE TRANSACTIONS on Electronics
Modified CMOS Op-Amp with Improved Gain and Bandwidth
Summary :
This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3 dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3 V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35 µm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E89-C No.6 pp.775-780
- Publication Date
- 2006/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e89-c.6.775
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
- Category
Authors
Keyword
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Mahdi MOTTAGHI-KASHTIBAN, Khayrollah HADIDI, Abdollah KHOEI, "Modified CMOS Op-Amp with Improved Gain and Bandwidth" in IEICE TRANSACTIONS on Electronics,
vol. E89-C, no. 6, pp. 775-780, June 2006, doi: 10.1093/ietele/e89-c.6.775.
Abstract: This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3 dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3 V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35 µm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.6.775/_p
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@ARTICLE{e89-c_6_775,
author={Mahdi MOTTAGHI-KASHTIBAN, Khayrollah HADIDI, Abdollah KHOEI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Modified CMOS Op-Amp with Improved Gain and Bandwidth},
year={2006},
volume={E89-C},
number={6},
pages={775-780},
abstract={This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3 dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3 V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35 µm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.},
keywords={},
doi={10.1093/ietele/e89-c.6.775},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - Modified CMOS Op-Amp with Improved Gain and Bandwidth
T2 - IEICE TRANSACTIONS on Electronics
SP - 775
EP - 780
AU - Mahdi MOTTAGHI-KASHTIBAN
AU - Khayrollah HADIDI
AU - Abdollah KHOEI
PY - 2006
DO - 10.1093/ietele/e89-c.6.775
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2006
AB - This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3 dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3 V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35 µm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.
ER -
English
