1-2hit |
Masanori SHIMASUE Hitoshi AOKI
This paper presents practical modeling procedure of feed patterns, bond wires, and interconnects for microwave bare-chip devices. Dedicated test structures have been designed for the process. Modeling accuracy of BJTs and diodes has been unprecedentedly improved up to 30 GHz with this procedure despite popular SPICE models were used.
Masanori SHIMASUE Yasuo KAWAHARA Takeshi SANO Hitoshi AOKI
Gate-to-bulk overlap capacitance (CGBO) cannot be ignored for long gate channel MOSFET's that are used for various I/O and analog circuits. We present a simple and yet accurate CGBO measurement and extractions by using a group of MOSFET's. Dedicated test structures using 0.18 µm shallow trench isolation technology were fabricated for the purpose. The effect of CGBO has been successfully analyzed. Validity of the CGBO extraction has been verified by comparing measured time delay of 51 stage ring oscillators with simulated data using our customized UCB SPICE3 simulator.