Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices
Summary :
This paper presents practical modeling procedure of feed patterns, bond wires, and interconnects for microwave bare-chip devices. Dedicated test structures have been designed for the process. Modeling accuracy of BJTs and diodes has been unprecedentedly improved up to 30 GHz with this procedure despite popular SPICE models were used.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E87-C No.1 pp.60-65
- Publication Date
- 2004/01/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Microwaves, Millimeter-Waves
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Masanori SHIMASUE, Hitoshi AOKI, "Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices" in IEICE TRANSACTIONS on Electronics,
vol. E87-C, no. 1, pp. 60-65, January 2004, doi: .
Abstract: This paper presents practical modeling procedure of feed patterns, bond wires, and interconnects for microwave bare-chip devices. Dedicated test structures have been designed for the process. Modeling accuracy of BJTs and diodes has been unprecedentedly improved up to 30 GHz with this procedure despite popular SPICE models were used.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e87-c_1_60/_p
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@ARTICLE{e87-c_1_60,
author={Masanori SHIMASUE, Hitoshi AOKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices},
year={2004},
volume={E87-C},
number={1},
pages={60-65},
abstract={This paper presents practical modeling procedure of feed patterns, bond wires, and interconnects for microwave bare-chip devices. Dedicated test structures have been designed for the process. Modeling accuracy of BJTs and diodes has been unprecedentedly improved up to 30 GHz with this procedure despite popular SPICE models were used.},
keywords={},
doi={},
ISSN={},
month={January},}
Copy
TY - JOUR
TI - Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices
T2 - IEICE TRANSACTIONS on Electronics
SP - 60
EP - 65
AU - Masanori SHIMASUE
AU - Hitoshi AOKI
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E87-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2004
AB - This paper presents practical modeling procedure of feed patterns, bond wires, and interconnects for microwave bare-chip devices. Dedicated test structures have been designed for the process. Modeling accuracy of BJTs and diodes has been unprecedentedly improved up to 30 GHz with this procedure despite popular SPICE models were used.
ER -
English
