This paper shows the applicability of the integral equation formulation of the measured equation of invariance (IE-MEI) to two-dimensional dielectric scatterers. That is, a relationship between the scattered electric and magnetic fields, which is derived from the new formulation of the IE-MEI, is applicable to lossless dielectric materials as well as perfect electric conductors (PEC). In addition, we show that the IE-MEI does not suffer from internal resonance problems. These two facts are validated by numerical examples for a circular cylinder and a square cylinder illuminated by Transverse Magnetic (TM) plane wave or a TM line source very close to the scatterers. The numerical results calculated by the IE-MEI agree well with the ones by moment methods that employ combined field formulations with exact boundary conditions.

We propose a new structure of antenna system to enhance the horizontal plane gain and control the antenna pattern, using passive loading. Our proposed structure can be applied to various kinds of antennas on a handset. We discuss the case of a λ/4 monopole antenna on a handset in this paper. In a new structure of λ/4 monopole antenna system, we show that, 1) the increase of the average gain about 5dB in the horizontal plane can be realized by an optimum load, 2) the antenna pattern can be controlled by changing the value of the passive load so as to have some desirable shapes, and 3) the antenna size can be made smaller by about 6% than the one with no loading because the optimum loading makes the resonant frequency lower. These results were confirmed by the calculations using the method of moments for the EFIE and the measurements.

High-frequency capacitance-voltage (C-V) characteristics of buried-channel MOS capacitors with a structure of subquarter-micron pMOS have been measured and analyzed, emphasizing transient behavior. The C-V characteristics, including transient behavior, of buried-channel MOS capacitors that have a counter-doped p layer at the surface of n substrate are very similar to those of surface-channel MOS capacitors of n substrate if the counter-doped layer is shallow enough to be fully inverted at large positive bias. As gate voltage is decreased, equilibrium capacitance for inversion (accumulation for the counter-doped layer) reaches a minimum value and then slightly increases to saturate, which is peculiar to buried-channel capacitors. The gate voltage for minimum capacitance, which has been used to estimate the threshold voltage, changes dramatically by illumination even in room light. Net doping profiles of n-type dopant can be obtained from pulsed C-V characteristics even for buried-channel capacitors. For MOS capacitors with thinner gate oxide (5 nm), steady-state C-V curve is not an equilibrium one but a deep depletion one at room temperature. This is because holes are drained away by tunneling through the thin gate oxide.