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[Author] Mitsutaka KATADA(1hit)

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  • Bevel Style High Voltage Power Transistor for Power IC

    Kazuhiro TSURUTA  Mitsutaka KATADA  Seiji FUJINO  Tadashi HATTORI  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1459-1464

    A bipolar power transistor which has beveled side walls with an exposed PN junction has been fabricate using silicon wafer direct bonding technique. It is suitable for a power IC which has a control circuit formed on a SOI structure and a vertical power transistor. It can achieve the breakdown voltage of more than 1000 V in smaller chip size than conventional power devices and reduce the ON-resistance because it is possible to optimize the thickness and resistivity of its low impurity collector layer. Angles of beveled side walls were determined by simulating the electric fields in the devices. As a result, it was found that both NPN and PNP bipolar power transistors with breakdown voltages of 1500 V could be fabricated.