In the nanometer era, the power integrity problem has become one of the critical issues. Although checking this problem earlier can speed up the analysis, not so many tools are available now due to the limited design information at high levels. Most existing approaches at gate level require extra information of the cell library, which may require extra characterization efforts while migrating to new cell libraries. Therefore, an analytical approach is proposed in this paper to dynamically estimate the supply current waveforms at gate level using existing library information only, even for sequential circuits. The experimental results have shown that the estimation errors of such a quick approach are only 10% compared to HSPICE results.