A static timing analysis (STA) tool for a 28nm atom-switch FPGA (AS-FPGA) is introduced to validate the signal delay of an application circuit before implementation. High accuracy of the STA tool is confirmed by implementing a practical application circuit on the 28nm AS-FPGA. Moreover, dramatic improvement of delay and power is demonstrated in comparison with a previous 40nm AS-FPGA.

We have developed a solid-electrolyte nonvolatile switch (here we refer as NanoBridge) with a low ON resistance and its small size. When we use a NanoBridge to switch elements in a programmable logic device, the chip size (or die cost) can be reduced and performance (speed and power consumption) can be enhanced. Developing this application required solving a couple of problems. First, the switching voltage of the NanoBridge (0.3 V) needed to be larger than the operating voltage of the logic circuit (>1 V). Second, the programming current (>1 mA) needed to be suppressed to avoid large power consumption. We demonstrate how the Nanobridge enhances the switching voltage and reduces the programming current.