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[Author] Naoki NAKAMURA(4hit)

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  • Cellular Automata Implementation of TPG Circuits for Built-In Two-Pattern Testing

    Kiyoshi FURUYA  Naoki NAKAMURA  

     
    PAPER-Built-in Self-Test

      Vol:
    E81-D No:7
      Page(s):
    675-681

    Cellular automata (CA) implementations are expected as potential test-pattern generators (TPGs) for Built-In Self-Testing of VLSI circuits, in which highly random parallel patterns ought to be generated with simple hardware. Objective here is to design one-dimensional, binary, and linear CA implementations with cyclic boundary conditions that can operate on maximum length of period. To provide maximum period of operations, it is necessary to bring some irregularities into the configurations. It is also expected for TPGs to make maximum or sufficiently long period of operations to prevent re-initialization. Our approach is to generate transition matrices based on fast parallel implementations of LFSRs which have trinomials as characteristic polynomials and then to modify the diagonal components. Some notable properties of diagonal vectors were observed.

  • A Statistical Method of Evaluating Pronunciation Proficiency for English Words Spoken by Japanese

    Seiichi NAKAGAWA  Naoki NAKAMURA  Kazumasa MORI  

     
    PAPER-Speech and Hearing

      Vol:
    E87-D No:7
      Page(s):
    1917-1922

    In this paper, we propose a statistical method of evaluating the pronunciation proficiency of English words spoken by Japanese. We analyzed statistically the utterances to note a combination that has a high correlation between an English teacher's score and certain acoustic features. We obserbed that the phoneme recognition rates (correct rate and accuracy) were the best measure of pronunciation proficiency, and the likelihood ratio of English phoneme acoustic models to phoneme acoustic models adapted by Japanese was the second best measure. The effective measure which was highly correlated with the English teacher's score was the combination of the likelihood for American native models, likelihood for English models adapted by Japanese, the best likelihood for arbitrary sequences of acoustic models, phoneme recognition rate and the rate of speech. We obtained a correlation coefficient of 0.81 with an open data for vocabulary and 0.69 with open data for speaker at the five words set level, respectively. The coefficient was higher than the correlation between humans' scores, 0.65. In the 15 words set level which corresponds to one or two sentences, we obtained the correlation coefficient of 0.86 with open data for the speaker.

  • A Basic Study on a Very Low-Level DC Current Amplifier Using a Switched-Capacitor Circuit

    Hiroki HIGA  Naoki NAKAMURA  Ikuo NAKAMURA  

     
    PAPER

      Vol:
    E88-A No:6
      Page(s):
    1394-1400

    In order to miniaturize a very low-level dc current amplifier and to speed up its output response speed, we proposed to employ the switched-capacitor circuit (SCC) as its negative feedback circuit, instead of the conventionally used high-ohmage resistor. However, in the case of using SCC, the output waveform had unnecessary components. To decrease the effect of these components and to speed up the response speed, we used a switched-capacitor filter (SCF), an offset controller, and a positive feedback circuit. As a result, we demonstrated that it was useful to use the amplifier using the SCC.

  • Hot Carrier Induced Degradation Due to Multi-Phonon Mechanism Analyzed by Lattice and Device Monte Carlo Coupled Simulation

    Shirun HO  Yasuyuki OHKURA  Takuya MARUIZUMI  Prasad JOSHI  Naoki NAKAMURA  Shoichi KUBO  Sigeo IHARA  

     
    INVITED PAPER

      Vol:
    E86-C No:3
      Page(s):
    336-349

    A new multi-phonon model for hydrogen desorption at Si/SiO2 interface due to hot carriers is proposed for a multi-scale simulation, in which Lattice Monte Carlo method is coupled with Device Monte Carlo method by using a mediator-based common software platform. The power law between interface trap density and time (Nit tα) of which power α =0.5 is demonstrated and shows good agreement with experimental results. Dependence of Vth shift on the current stress time is analyzed accurately by introducing an electron trap model. According to the multi-phonon mechanism, it is found that hot carriers will generate defects on the gate dielectrics in 13 nm gate device under low operation voltage of Vd=0.5 V but density of interface traps after long stress time is suppressed to 1015 m-2.