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Shirun HO Aya MORIYOSHI Isao OHBU Osamu KAGAYA Hiroshi MIZUTA Ken YAMAGUCHI
A new mobility model dependent upon electron concentration is presented for studying the screening effect on ionized impurity scattering. By coupling this model with the drift-diffusion and Hartree models, the effects of self-consistent and quasi-equilibrium screening on carrier transport in heavily doped systems are revealed for first time. The transport mechanism is found to be dominated by the electron-concentration-dependent mobility, and transconductance is shown to be determined by effective mobility and changes from degraded to enhanced characteristics with electron concentration modulation.
Shirun HO Masaki OOHIRA Osamu KAGAYA Aya MORIYOSHI Hiroshi MIZUTA Ken YAMAGUCHI
A unified model for frequency-dependent characteristics of transconductance and output resistance is presented that incorporates the dynamics of quasi-Fermi levels. Using this model, multiple-frequency dispersion and pulse-narrowing phenomena in GaAs MESFETs are demonstrated based on the drift-diffusion transport theory and a Schockley-Read-Hall-type deep trap model, where rate equations for multiple trapping processes are analyzed self-consistently. It is shown that the complex frequency dependence is due to both spatial and temporal effects of multiple traps.
Shirun HO Yasuyuki OHKURA Takuya MARUIZUMI Prasad JOSHI Naoki NAKAMURA Shoichi KUBO Sigeo IHARA
A new multi-phonon model for hydrogen desorption at Si/SiO2 interface due to hot carriers is proposed for a multi-scale simulation, in which Lattice Monte Carlo method is coupled with Device Monte Carlo method by using a mediator-based common software platform. The power law between interface trap density and time (Nit tα) of which power α =0.5 is demonstrated and shows good agreement with experimental results. Dependence of Vth shift on the current stress time is analyzed accurately by introducing an electron trap model. According to the multi-phonon mechanism, it is found that hot carriers will generate defects on the gate dielectrics in 13 nm gate device under low operation voltage of Vd=0.5 V but density of interface traps after long stress time is suppressed to 1015 m-2.