The search functionality is under construction.

Author Search Result

[Author] Nguyen NGOC MAI-KHANH(2hit)

1-2hit
  • Design, Analysis and Implementation of Pulse Generator by CMOS Flipped on Glass for Low Power UWB-IR

    Parit KANJANAVIROJKUL  Nguyen NGOC MAI-KHANH  Tetsuya IIZUKA  Toru NAKURA  Kunihiro ASADA  

     
    PAPER

      Vol:
    E100-A No:1
      Page(s):
    200-209

    This paper discusses a pulse generator implemented by CMOS flipped on a glass substrate aiming at low power applications with low duty cycle. The pulse generator is theoretically possible to generate a pulse at a frequency near and beyond Fmax. It also features a quick starting time and zero stand-by power. By using a simplified circuit model, analytical expressions for Q factor, energy conversion efficiency, output energy, and oscillation frequency of the pulse generator are derived. Pulse generator prototypes are designed on a 0.18 μm CMOS chip flipped over a transmission line resonator on a glass substrate. Measurement results of two different prototypes confirm the feasibility of the proposed circuit and the analytical model.

  • A CMOS Broadband Transceiver with On-Chip Antenna Array and Built-In Pulse-Delay Calibration for Millimeter-Wave Imaging Applications

    Nguyen NGOC MAI-KHANH  Kunihiro ASADA  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E100-C No:12
      Page(s):
    1078-1086

    A fully integrated CMOS pulse transceiver with digital beam-formability for mm-wave active imaging is presented. The on-chip pulse transmitter of the transceiver includes an eight-element antenna array connected to eight pulse transmitters and a built-in relative pulse delay calibration system. The receiver employs a non-coherent detection method by using a FET direct-power detection circuit integrated with an antenna. The receiver dipole-patch antenna derives from the transmitter antenna but is modified with an on-chip DC-bias tail by shorting two arms of the dipole. The bandwidth of the receiver antenna with the DC-bias tail is designed to achieve 50.4-GHz in simulation and to cover the bandwidth of transmitter antennas. The output of the receiver antenna is connected to a resistive self-mixer followed by an on-chip low pass filter and then an amplifier stage. The built-in relative pulse delay calibration system is used to align the pulse delays of each transmitter array elements for the purpose of controlling the beam steering towards imaging objects. Both transmitter and receiver chips are fabricated in a 65-nm CMOS technology process. Measured pulse waveform of the receiver after relatively aligning all Tx's pulses is 0.91 mV (peak-peak) and 3-ns duration with a distance of 25mm between Rx and Tx. Beam steering angles are achieved in measurement by changing the digital delay code of antenna elements. Experimental results show that the proposed on-chip transceiver has an ability of digital transmitted-pulse calibration, controlling of beam-steeting, and pulse detection for active imaging applications.