In this paper we investigate designing optimal linear transmit/receive processing filters for multiuser MIMO downlinks with imperfect channel state information (CSI) and spatial fading correlation between antenna array at BS. A robust scheme is proposed to obtain the optimal linear transmit/receive filters in the sense of minimizing the average sum mean square error (SMSE) conditional on noisy channel estimates under a per-user transmit power constraint. Using an iterative procedure, the proposed scheme extends the existing optimization algorithm for uncorrelated single-user MIMO systems with perfect CSI to solve the problem of minimizing SMSE in spatially correlated MIMO downlinks with imperfect CSI. Comparing with non-robust scheme, we show that robust scheme efficiently mitigates the BER loss induced by imperfect CSI. In addition, the impact of fading correlation at BS on the performance of the proposed robust scheme is analyzed.

We propose a current mode sense amplifier that uses a current-mirror to increase the bitline sensing current, which dominates the sensing speed. A comparison of the sensing delay shows that the proposed sense amplifier can provide about 12.6∼15.4% improvement depending on different bitline loads in sensing speed over original WTA scheme.

Sum power iterative water-filling (SPIWF) algorithm provides sum-rate-optimal transmission scheme for wireless multiple-input multiple-output (MIMO) broadcast channels (BC), whereas it suffers from its high complexity. In this paper, we propose a new transmission scheme based on a novel block zero-forcing dirty paper coding (Block ZF-DPC) strategy and multiuser-diversity-achieving user selection procedure. The Block ZF-DPC can be considered as an extension of existing ZF-DPC into MIMO BCs. Two user selection algorithms having linear increasing complexity with the number of users have been proposed. One aims at maximizing the achievable sum rate directly and the other is based on Gram-Schmidt Orthogonalization (GSO) and Frobenius norm. The proposed scheme is shown to achieve a sum rate close to the sum capacity of MIMO BC and obtain optimal multiplexing and multiuser diversity gain. In addition, we also show that both selection algorithms achieve a significant part of the sum rate of the optimal greedy selection algorithm at low computation expenditure.

1.5 µm-band LiNbO3 quasiphase matched (QPM) wavelength converters consisting of a periodical domain inverted structure and a proton exchanged waveguide, have been studied in detail both theoretically and experimentally. Optimum device fabrication conditions are investigated with respected to waveguide propagation loss, coupling loss to a single-mode fiber and wavelength conversion efficiency. A normalized conversion efficiency as high as 200 %/W (by a SHG measurement) and a fiber-to-fiber insertion loss of less than 3.5 dB (@1.55 µm) is obtained for a wavelength converter module with a device length of 40 mm. It is shown that a highly uniform periodical domain inverted structure and a uniform proton exchange waveguide are key to obtaining efficient wavelength conversion. The tolerance of the waveguide width fluctuation is found to be very critical and is less than 20 nm for a 40 mm-long device. Future optimization of LiNbO3 QPM wavelength converters and the possible device applications in future optical communication systems are also presented.

In this paper, the resource allocation problem for proportional fairness in hybrid Cognitive Radio (CR) systems is studied. In OFDMA-based CR systems, traditional resource allocation algorithms can not guarantee proportional rates among CR users (CRU) in each OFDM symbol because the number of available subchannels might be smaller than that of CRUs in some OFDM symbols. To deal with this time-varying nature of available spectrum resource, a hybrid CR scheme in which CRUs are allowed to use subchannels in both spectrum holes and primary users (PU) bands is adopted and a resource allocation algorithm is proposed to guarantee proportional rates among CRUs with no undue interference to PUs.

Transistor stuck–open faults in CMOS devices are such that they force combinational circuits to exhibit sequential behaviors. It has been proved that, in general, stuck–open faults can not be modeled as stuck–at faults and, therefore, a sequence of two consecutive test vectors is necessary to guarantee stuck–open fault detection. In this paper we propose a technique to modify CMOS circuits in such a way that any stuck–open fault in the circuit can be detected using only a single test pattern. The amount of additional logic required to achieve the goal is rather limited: Two pass transistors, one input line, and one inverter (or buffer) at the output of the circuit are sufficient to make stuck–open faults detectable by test patterns generated by usual stuck–at fault test generators.

In this paper, we design a stealthy GSM phone identity catcher. As the GSM protocols do not mandate the authentication of BSes (Base Stations) to MSes (Mobile Stations), fake BSes can be implemented to lure victims to register with and thereby intercept crucial information of the user, including their identities. However, the straightforward implementation of GSM phone identity catcher can be easily perceived by users employing detection software due to such phenomena as phone interface changes and service interruptions. In this paper, we propose several effective mechanisms, such as smart configuration of the fake BSes, quick attachment/detachment and service relay, to make the catching process invisible to users and software. Real world experiments have been conducted and the results prove the efficiency and stealth of our proposed GSM phone identity catcher. We hope our work could help to enhance the effectiveness of IMSI catching attack and thereby alert the industry to design stronger authentication protocol in communication systems.

In this paper, we propose a fully parallel Turbo decoder for Software-Defined Radio (SDR) on the Graphics Processing Unit (GPU) platform. Soft Output Viterbi algorithm (SOVA) is chosen for its low complexity and high throughput. The parallelism of SOVA is fully analyzed and the whole codeword is divided into multiple sub-codewords, where the turbo-pass decoding procedures are performed in parallel by independent sub-decoders. In each sub-decoder, an efficient initialization method is exploited to assure the bit error ratio (BER) performance. The sub-decoders are mapped to numerous blocks on the GPU. Several optimization methods are employed to enhance the throughput, such as the memory optimization, codeword packing scheme, and asynchronous data transfer. The experiment shows that our decoder has BER performance close to Max-Log-MAP and the peak throughput is 127.84Mbps, which is about two orders of magnitude faster than that of central processing unit (CPU) implementation, which is comparable to application-specific integrated circuit (ASIC) solutions. The presented decoder can achieve higher throughput than that of the existing fastest GPU-based implementation.

Aiming to ease the parallel programming for heterogeneous architectures, we propose and implement a high-level OpenCL runtime that conceptually merges multiple heterogeneous hardware devices into one virtual heterogeneous compute device (VHCD). Moreover, automated workload distribution among the devices is based on offline profiling, together with new programming directives that define the device-independent data access range per work-group. Therefore, an OpenCL program originally written for a single compute device can, after inserting a small number of programming directives, run efficiently on a platform consisting of heterogeneous compute devices. Performance is ensured by introducing the technique of virtual cache management, which minimizes the amount of host-device data transfer. Our new OpenCL runtime is evaluated by a diverse set of OpenCL benchmarks, demonstrating good performance on various configurations of a heterogeneous system.