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[Author] Seiichi ARITOME(3hit)

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  • A Novel Programming Method Using a Reverse Polarity Pulse in Flash EEPROMs

    Hirohisa IIZUKA  Tetsuo ENDOH  Seiichi ARITOME  Riichiro SHIROTA  Fujio MASUOKA  

     
    PAPER-Nonvolatile memories

      Vol:
    E79-C No:6
      Page(s):
    832-835

    The data retention characteristics for Flash EEPROM degrade after a large number of write and erase cycles due to the increase of the tunnel oxide leakage current. This paper proposes a new write/erase method which uses a reverse polarity pulse after each erase pulse. By using this method, the leakage current can be suppressed. As a result, the read disturb time after 105cycles write/erase operation is more than 10 times longer in comparison with that of the conventional method. Moreover, using this method, the endurance cycle dependence of the threshold voltage after write and erase operation is also drastically improved.

  • Data Retention Characteristics of Flash Memory Cells after Write and Erase Cycling

    Seiichi ARITOME  Riichiro SHIROTA  Koji SAKUI  Fujio MASUOKA  

     
    PAPER-Non-volatile Memory

      Vol:
    E77-C No:8
      Page(s):
    1287-1295

    The data retention characteristics of a Flash memory cell with a self-aligned double poly-Si stacked structure have been drastically improved by applying a bi-polarity write and erase technology which uses uniform Fowler-Nordheim tunneling over the whole channel area both during write and erase. It is clarified experimentally that the detrapping of electrons from the gate oxide to the substrate results in an extended retention time. A bi-polarity write and erase technology also guarantees a wide cell threshold voltage window even after 106 write/erase cycles. This technology results in a highly reliable EEPROM with an extended data retention time.

  • A Study of High-Performance NAND Structured EEPROMS

    Tetsuo ENDOH  Riichiro SHIROTA  Seiichi ARITOME  Fujio MASUOKA  

     
    PAPER

      Vol:
    E75-C No:11
      Page(s):
    1351-1357

    This paper describes the superior performances of the NAND EEPROM. Those are 1) a very small cell area: 4.83 µm2 using 0.7 µm design rule, 2) small block size for erasing: 4 Kbyte block erasing for 4 M-bit NAND EEPROM, 3) high speed programming: 180 nsec per byte for 4 M-bit NAND EEPROM, 4) large number of erase/program endurance cycles: more than 105 cycles for 4 M-bit NAND EEPROM. These extended performances coincide with the requirement for the EEPROM to replace magnetic memories such as hard and floppy disks. Especially, it is shown that NAND EEPROM has the capability to enlarge the erase/program endurance up to 3.6108 cycles. This endurance is a result of the erase and program mechanism of the NAND EEPROM cell. Fowler-Nordheim (F-N) tunneling currents flow from the substrate to the floating gate during programming and opposite currents flow during erasing. This bi-polarity F-N tunneling erase/program operation extends the life time of the tunnel oxide which results in an improved endurance.