An experimental 640-Gbit/s ATM switching system is described. The switching system is scalable and quasi-non-blocking and uses hardware self-rearrangement in a three-stage network. Hardware implementation results for the switching system are presented. The switching system is fabricated using advanced 0.25-µm CMOS devices, high-density multi-chip-module (MCM) technology, and optical wavelength-division-multiplexing (WDM) interconnection technology. A scalable 80-Gbit/s switching module is fabricated in combination with a developed scalable-distributed-arbitration technique, and a WDM interconnection system that connects multiple 80-Gbit/s switching modules is developed. Using these components, an experimental 640-Gbit/s switching system is partially constructed. The 640-Gbit/s switching system will be applied to future broadband ATM networks.

This paper proposesd a non-blocking multi-stage ATM switch based on a hierarchical-cell-resequencing (HCR) mechanism and high-speed WDM interconnection and reports on its feasibility study. In a multi-stage ATM switch, cell-based routing is effective to make the switch non-blocking, because all traffic is randomly distributed over intermediate switching stages. But due to the multi-path conditions, cells may arrive out of sequence at the output of the switching fabric. Therefore, resequencing must be performed either at each output of the final switching stage or at the output of each switching stage. The basic HCR switch performs cell resequencing in a hierarchical manner when switching cells from an input-lines to a output-line. As a result, the cell sequence in each output of the basic HCR switch is recovered. A multi-stage HCR switch is constructed by interconnecting the input-lines and output-lines of these basic HCR switches in a hierarchical manner. Therefore, the cell sequence in each final output of the switching fabric is conserved in a hierarchical manner. In this way, cell-based routing becomes possible and a multi-stage ATM switch with the HCR mechanism can achieve 100% throughput without any internal speed-up techniques. Because a large-capacity multi-stage HCR switch needs a huge number of high-speed signal interconnections, a breakthrough in compact optical interconnection technology is required. Therefore, this paper proposes a WDM interconnection system with an optical router arrayed waveguide filter (AWGF) that interconnects high-speed switch elements effectively and reports its feasibility study. In this architecture, each switch element is addressed by a unique wavelength. As a result, a switch in a previous stage can transmit a cell to any switch in the next stage by only selecting its cell transmission wavelength. To make this system feasible, we developed a wide-channel-spacing optical router AWGF and compact 10-Gbit/s optical transmitter and receiver modules with a compact high-power electroabsorption distributed feedback (EA-DFB) laser and a new bit decision circuit. Using these modules, we confirmed stable operation of the WDM interconnection. This switch architecture and WDM interconnection system should enable the development of high-speed ATM switching systems that can achieve throughput of over 1 Tbit/s.

This paper proposesd a non-blocking multi-stage ATM switch based on a hierarchical-cell-resequencing (HCR) mechanism and high-speed WDM interconnection and reports on its feasibility study. In a multi-stage ATM switch, cell-based routing is effective to make the switch non-blocking, because all traffic is randomly distributed over intermediate switching stages. But due to the multi-path conditions, cells may arrive out of sequence at the output of the switching fabric. Therefore, resequencing must be performed either at each output of the final switching stage or at the output of each switching stage. The basic HCR switch performs cell resequencing in a hierarchical manner when switching cells from an input-lines to a output-line. As a result, the cell sequence in each output of the basic HCR switch is recovered. A multi-stage HCR switch is constructed by interconnecting the input-lines and output-lines of these basic HCR switches in a hierarchical manner. Therefore, the cell sequence in each final output of the switching fabric is conserved in a hierarchical manner. In this way, cell-based routing becomes possible and a multi-stage ATM switch with the HCR mechanism can achieve 100% throughput without any internal speed-up techniques. Because a large-capacity multi-stage HCR switch needs a huge number of high-speed signal interconnections, a breakthrough in compact optical interconnection technology is required. Therefore, this paper proposes a WDM interconnection system with an optical router arrayed waveguide filter (AWGF) that interconnects high-speed switch elements effectively and reports its feasibility study. In this architecture, each switch element is addressed by a unique wavelength. As a result, a switch in a previous stage can transmit a cell to any switch in the next stage by only selecting its cell transmission wavelength. To make this system feasible, we developed a wide-channel-spacing optical router AWGF and compact 10-Gbit/s optical transmitter and receiver modules with a compact high-power electroabsorption distributed feedback (EA-DFB) laser and a new bit decision circuit. Using these modules, we confirmed stable operation of the WDM interconnection. This switch architecture and WDM interconnection system should enable the development of high-speed ATM switching systems that can achieve throughput of over 1 Tbit/s.