This paper describes an analytic method, experimental results and simulation results for self-heating in a SOI (Silicon On Insulator) high voltage MOS transistor. The new analytic method enabled the temperature-rise caused by self-heating to be measured precisely. The temperature-rise in an operating transistor was evaluated by measuring the change of the source current against the source current without the self-heating. In advance, the relation between the temperature-rise and the current change had been prepared by measuring the current decrease when the hot-chuck temperature had been changed in iso-thermal condition. By using this method, the dependence of the temperature-rise or the current decrease on the operating condition or the thermal resistance were clarified. Furthermore, these measurement results and the thermal resistance which is calculated by a FEM analysis enabled a fully coupled electrothermal device simulation to be analyzed more precisely. The dependence of the current decrease on the buried oxide thickness were also calculated.

The development of highly accurate and durable control system is becoming a must for todays high performance automobiles. For example, it is necessary to up-grade todays materials and methods creating more sensitive sensors, higher speed processors and more accurate actuators, while also being more durable. Thus, the development of a CMOS time-to-digital converter LSI with half-nanosecond resolution, which controls only pulse signals was achieved by employing 1.5 µm CMOS technology. The new signal detecting circuit, 1.1 mm2 in size, converts time to numerical values over a wide measurement range (13 bits). The compact digital circuit employs a newly developed "ring gate delay system". Within the LSI the fully digital circuit is highly durable. This allows it to be utilized even under severe conditions (for example an operating ambient temperature of 130). In order to measure time accurately, a method of correcting the variation of measurement time data employing a real-time conversion fully digital circuit is described. This method allows for fully automatic correction with a microcomputer, so no manual adjustment is required. In addition to sensor circuit applications, the LSI has great potential for Application Specific Integrated Circuit, (ASIC) such as a function cell with is a completely new method of measuring time.

The subject of this study is to propose a new structure that can realize simultaneously high breakdown voltage and high packing density for both Nch low side switch and Pch high side switch in 200 V class rating. As the conventional techniques for the electric field relaxation, the structure of field plate, field ring and RESURF are well known, but these techniques are inadequate for the high packing density because they are the techniques in surface region. In order to conquer this subject, it is necessary to relax the electric field in the deep region. The electric field relaxation was investigated by device simulation. In the Nch low side switch the electric field is relaxed by buried oxide film in SOI structure. However, electric field relaxation cannot be realized only by adapting the SOI structure for Pch high side switch. Then we tried to insert an intrinsic layer between P-drift layer and the buried oxide film in order to spread the depletion layer in the deep region. This spread depletion layer by intrinsic layer and the depletion layer by field plate connect vertically, and the dosage of the ion implantation for drift layer can be set to two times higher than the case without intrinsic layer. As the results, it was revealed that the SOI structure with intrinsic layer is effective to achieve this subject. Furthermore, by fabricating both Nch low side switch and Pch high side switch on intrinsic SOI substrate, breakdown voltage more than 250 V were achieved.