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[Author] Shorin KYO(3hit)

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  • Overtaking Vehicle Detection Method and Its Implementation Using IMAPCAR Highly Parallel Image Processor

    Kazuyuki SAKURAI  Shorin KYO  Shin'ichiro OKAZAKI  

     
    PAPER

      Vol:
    E91-D No:7
      Page(s):
    1899-1905

    This paper describes the real-time implementation of a vision-based overtaking vehicle detection method for driver assistance systems using IMAPCAR, a highly parallel SIMD linear array processor. The implemented overtaking vehicle detection method is based on optical flows detected by block matching using SAD and detection of the flows' vanishing point. The implementation is done efficiently by taking advantage of the parallel SIMD architecture of IMAPCAR. As a result, video-rate (33 frames/s) implementation could be achieved.

  • Media Processing LSI Architectures for Automotives -- Challenges and Future Trends --

    Ichiro KURODA  Shorin KYO  

     
    INVITED PAPER

      Vol:
    E90-C No:10
      Page(s):
    1850-1857

    This paper presents media processor architectures for automotive applications. Media processing applications with their requirements for LSI implementations are first described for vision based driver assistance as well as graphical user interface for car navigation using 3D graphics. Then, parallel processing architectures for vision and graphics in these applications are reviewed with their performance and cost. After that, future trends of automotive media processing such as integration of vision and 3D graphics functions are shown with their applications and the required performance. Moreover, parallel processing architectures are discussed for the integration of vision and graphics. Finally, an prospect of a next-generation media processing LSI for automotives is provided.

  • A 51.2 GOPS Programmable Video Recognition Processor for Vision-Based Intelligent Cruise Control Applications

    Shorin KYO  Takuya KOGA  Shin'ichiro OKAZAKI  Ichiro KURODA  

     
    PAPER-Processor

      Vol:
    E87-D No:1
      Page(s):
    136-145

    This paper describes a 51.2 GOPS video recognition processor that provides a cost effective device solution for vision-based intelligent cruise control (ICC) applications. By integrating 128 4-way VLIW (Very Low Instruction Word) processing elements and operating at 100 MHz, the processor achieves to provide a computation power enough for a weather robust lane mark and vehicle detection function written in a high level programming language, to run in video rate, while at the same time it satisfies power efficiency requirements of an in-vehicle LSI. Basing on four basic parallel methods and a software environment including an optimizing compiler of an extended C language and video-based GUI tools, efficient development of real-time video recognition applications that effectively utilize the 128 processing elements are facilitated. Benchmark results show that, this processor can provide a four times better performance compared with a 2.4 GHz general purpose micro-processor.