This paper presents a technique for reducing spurious output of balanced modulators used in transmitters and arbitrary waveform generators. Two-step upconversion is a convenient way to produce a desired single-sideband (SSB) radio-frequency (RF) signal--baseband quadrature I and Q signals (which are analog outputs of direct digital frequency synthesizers) are upconverted by mixers and local oscillators (LOs)--but mismatches between the DACs in I and Q paths cause spurious output. We propose a method of dynamically matching the I and Q paths by multiplexing two DACs between I and Q paths in a pseudo-random manner. MATLAB simulation shows that multiplexing the two DACs spreads the spurious output, caused by mismatches between the two DACs, in the frequency domain, and reduces the peak level of spurious signals.

This paper proposes a new approach for analog portion testing, which can meet requirements for high-speed and high-accuracy testing simultaneously with reasonable cost. The key concept of the new method is cooperation of an LSI tester and some circuitry built in a target SoC device. We will explain the operation principle of the proposed method. The proposed method can be one of the methods to overcome today's expensive production test of analog portion on SoC (System on Chip) devices which heavily depends on LSI tester capability and will become harder in near future.

This paper describes two digital correction algorithms for ADC nonlinearity, targeted for mixed-signal LSI tester applications: an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.