IEICE TRANSACTIONS on Fundamentals
Algorithms for Digital Correction of ADC Nonlinearity
Summary :
This paper describes two digital correction algorithms for ADC nonlinearity, targeted for mixed-signal LSI tester applications: an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.2 pp.504-508
- Publication Date
- 2003/02/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- LETTER
- Category
- Analog Signal Processing
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Haruo KOBAYASHI, Hiroshi YAGI, Takanori KOMURO, Hiroshi SAKAYORI, "Algorithms for Digital Correction of ADC Nonlinearity" in IEICE TRANSACTIONS on Fundamentals,
vol. E86-A, no. 2, pp. 504-508, February 2003, doi: .
Abstract: This paper describes two digital correction algorithms for ADC nonlinearity, targeted for mixed-signal LSI tester applications: an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_2_504/_p
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@ARTICLE{e86-a_2_504,
author={Haruo KOBAYASHI, Hiroshi YAGI, Takanori KOMURO, Hiroshi SAKAYORI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Algorithms for Digital Correction of ADC Nonlinearity},
year={2003},
volume={E86-A},
number={2},
pages={504-508},
abstract={This paper describes two digital correction algorithms for ADC nonlinearity, targeted for mixed-signal LSI tester applications: an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - Algorithms for Digital Correction of ADC Nonlinearity
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 504
EP - 508
AU - Haruo KOBAYASHI
AU - Hiroshi YAGI
AU - Takanori KOMURO
AU - Hiroshi SAKAYORI
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2003
AB - This paper describes two digital correction algorithms for ADC nonlinearity, targeted for mixed-signal LSI tester applications: an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.
ER -
English
