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[Author] Takashi SHIMAMOTO(15hit)

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  • A High-Throughput Binary Arithmetic Coding Architecture for H.264/AVC CABAC

    Yizhong LIU  Tian SONG  Takashi SHIMAMOTO  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E93-A No:9
      Page(s):
    1594-1604

    In this paper, we propose a high-throughput binary arithmetic coding architecture for CABAC (Context Adaptive Binary Arithmetic Coding) which is one of the entropy coding tools used in the H.264/AVC main and high profiles. The full CABAC encoding functions, including binarization, context model selection, arithmetic encoding and bits generation, are implemented in this proposal. The binarization and context model selection are implemented in a proposed binarizer, in which a FIFO is used to pack the binarization results and output 4 bins in one clock. The arithmetic encoding and bits generation are implemented in a four-stage pipeline with the encoding ability of 4 bins/clock. In order to improve the processing speed, the context variables access and update for 4 bins are paralleled and the pipeline path is balanced. Also, because of the outstanding bits issue, a bits packing and generation strategy for 4 bins paralleled processing is proposed. After implemented in verilog-HDL and synthesized with Synopsys Design Compiler using 90 nm libraries, this proposal can work at the clock frequency of 250 MHz and takes up about 58 K standard cells, 3.2 Kbits register files and 27.6 K bits ROM. The throughput of processing 1000 M bins per second can be achieved in this proposal for the HDTV applications.

  • A Genetic Approach for Maximum Independent Set Problems

    Akio SAKAMOTO  Xingzhao LIU  Takashi SHIMAMOTO  

     
    PAPER

      Vol:
    E80-A No:3
      Page(s):
    551-556

    Genetic algorithms have been shown to be very useful in a variety of search and optimization problems. In this paper we present a genetic algorithm for maximum independent set problem. We adopt a permutation encoding with a greedy decoding to solve the problem. The DIMACS benchmark graphs are used to test our algorithm. For most graphs solutions found by our algorithm are optimal, and there are also a few exceptions that solutions found by the algorithm are almost as large as maximum clique sizes. We also compare our algorithm with a hybrid genetic algorithm, called GMCA, and one of the best existing maximum clique algorithms, called CBH. The exiperimental results show that our algorithm outperformed two of the best approaches by GMCA and CBH in final solutions.

  • Fast Coding Unit Size Decision Based on Probabilistic Graphical Model in High Efficiency Video Coding Inter Prediction

    Xiantao JIANG  Tian SONG  Wen SHI  Takafumi KATAYAMA  Takashi SHIMAMOTO  Lisheng WANG  

     
    LETTER-Image Processing and Video Processing

      Pubricized:
    2016/08/08
      Vol:
    E99-D No:11
      Page(s):
    2836-2839

    In this work, a high efficiency coding unit (CU) size decision algorithm is proposed for high efficiency video coding (HEVC) inter coding. The CU splitting or non-splitting is modeled as a binary classification problem based on probability graphical model (PGM). This method incorporates two sub-methods: CU size termination decision and CU size skip decision. This method focuses on the trade-off between encoding efficiency and encoding complexity, and it has a good performance. Particularly in the high resolution application, simulation results demonstrate that the proposed algorithm can reduce encoding time by 53.62%-57.54%, while the increased BD-rate are only 1.27%-1.65%, compared to the HEVC software model.

  • Heuristic State Reduction Methods of Incompletely Specified Machines Preceding to Satisfy Covering Condition

    Masaki HASHIZUME  Takeomi TAMESADA  Takashi SHIMAMOTO  Akio SAKAMOTO  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E81-A No:6
      Page(s):
    1045-1054

    This paper presents two kinds of simplification methods for incompletely specified sequential machines. The strategy of the methods is that as many states in original machines are covered in the simplification processes as possible. The purpose of the methods is to derive a simplified machine having either the largest maximal compatible set or its subset. With the methods, one of the minimal machines can not be always derived, but a near-minimal machine can be obtained more quickly with less memory, since they need not derive all the compatible sets. In this paper, the effectiveness of the methods is checked by applying them to simplification problems of incompletely specified machines generated by using random numbers, and of the MCNC benchmark machines. The experimental results show that our methods can derive a simplified machine quickly, especially for machines having a great number of states or don't care rate.

  • Compressed Sensing Signal Recovery via Creditability-Estimation Based Matching Pursuit

    Yizhong LIU  Tian SONG  Yiqi ZHUANG  Takashi SHIMAMOTO  Xiang LI  

     
    PAPER-Digital Signal Processing

      Vol:
    E98-A No:6
      Page(s):
    1234-1243

    This paper proposes a novel greedy algorithm, called Creditability-Estimation based Matching Pursuit (CEMP), for the compressed sensing signal recovery. As proved in the algorithm of Stagewise Orthogonal Matching Pursuit (StOMP), two Gaussian distributions are followed by the matched filter coefficients corresponding to and without corresponding to the actual support set of the original sparse signal, respectively. Therefore, the selection for each support point is interpreted as a process of hypothesis testing, and the preliminarily selected support set is supposed to consist of rejected atoms. A hard threshold, which is controlled by an input parameter, is used to implement the rejection. Because the Type I error may happen during the hypothesis testing, not all the rejected atoms are creditable to be the true support points. The creditability of each preliminarily selected support point is evaluated by a well-designed built-in mechanism, and the several most creditable ones are adaptively selected into the final support set without being controlled by any extra external parameters. Moreover, the proposed CEMP does not necessitate the sparsity level to be a priori control parameter in operation. In order to verify the performance of the proposed algorithm, Gaussian and Pulse Amplitude Modulation sparse signals are measured in the noiseless and noisy cases, and the experiments of the compressed sensing signal recoveries by several greedy algorithms including CEMP are implemented. The simulation results show the proposed CEMP can achieve the best performances of the recovery accuracy and robustness as a whole. Besides, the experiment of the compressed sensing image recovery shows that CEMP can recover the image with the highest Peak Signal to Noise Ratio (PSNR) and the best visual quality.

  • High Efficiency CU Depth Prediction Algorithm for High Resolution Applications of HEVC

    Xiantao JIANG  Tian SONG  Wen SHI  Takashi SHIMAMOTO  Lisheng WANG  

     
    PAPER-High-Level Synthesis and System-Level Design

      Vol:
    E98-A No:12
      Page(s):
    2528-2536

    The purpose of this work is to reduce the redundant coding process with the tradeoff between the encoding complexity and coding efficiency in HEVC, especially for high resolution applications. Therefore, a CU depth prediction algorithm is proposed for motion estimation process of HEVC. At first, an efficient CTU depth prediction algorithm is proposed to reduce redundant depth. Then, CU size termination and skip algorithm is proposed based on the neighboring block depth and motion consistency. Finally, the overall algorithm, which has excellent complexity reduction performance for high resolution application is proposed. Moreover, the proposed method achieves steady performance, and it can significantly reduce the encoding time in different environment configuration and quantization parameter. The simulation experiment results demonstrate that, in the RA case, the average time saving is about 56% with only 0.79% BD-bitrate loss for the high resolution, and this performance is better than the previous state of the art work.

  • Efficient Curve Fitting Technique for Analysis of Interconnect Networks with Frequency-Dependent Parameters

    Yuichi TANJI  Yoshifumi NISHIO  Takashi SHIMAMOTO  Akio USHIDA  

     
    PAPER-Transistor-level Circuit Analysis, Design and Verification

      Vol:
    E81-A No:12
      Page(s):
    2501-2508

    Analysis of frequency-dependent lossy transmission lines is very important for designing the high-speed VLSI, MCM and PCB. The frequency-dependent parameters are always obtained as tabulated data. In this paper, a new curve fitting technique of the tabulated data for the moment matching technique in the interconnect analysis is presented. This method based on Chebyshev interpolation enhances the efficiency of the moment matching technique.

  • Restrictive Channel Routing with Evolution Programs

    Xingzhao LIU  Akio SAKAMOTO  Takashi SHIMAMOTO  

     
    PAPER

      Vol:
    E76-A No:10
      Page(s):
    1738-1745

    Evolution programs have been shown to be very useful in a variety of search and optimization problems, however, until now, there has been little attempt to apply evolution programs to channel routing problem. In this paper, we present an exolution program and identify the key points which are essential to successfully applying evolution programs to channel routing problem. We also indicate how integrating heuristic information related to the problem under consideration helps in convergence on final solutions and illustrate the validity of out approach by providing experimental results obtained for the benchmark tests. compared with the optimal solutions.

  • A Distributed Routing System for Multilayer SOG

    Takashi SHIMAMOTO  Isao SHIRAKAWA  Hidetaka HANE  Nobuyasu YUI  Nobuyuki NISHIGUCHI  

     
    PAPER

      Vol:
    E76-A No:3
      Page(s):
    370-376

    A distributed processing system is described, which is dedicated to multilayer SOG routing. The system is constructed of global and detailed routers, each based on different rip-up and rerouting procedures, so as to be run on a computer network composed of a number of workstations. Several implementation results attained for five-layer SOG are also shown to reveal the practicability of the system.

  • Genetic State Reduction Method of Incompletely Specified Machines

    Masaki HASHIZUME  Teruyoshi MATSUSHIMA  Takashi SHIMAMOTO  Hiroyuki YOTSUYANAGI  Takeomi TAMESADA  Akio SAKAMOTO  

     
    PAPER-Graphs and Networks

      Vol:
    E87-A No:6
      Page(s):
    1555-1563

    A new state reduction method of incompletely specified sequential machines is proposed in this paper. The method is based on a genetic algorithm implementing a dormant mechanism. MCNC benchmark machines are simplified by using this method to evaluate the method. The experimental results show that machines of almost the same number of states as the minimum ones can be derived by this method.

  • Genetic Channel Router

    Xingzhao LIU  Akio SAKAMOTO  Takashi SHIMAMOTO  

     
    PAPER-Computer Aided Design (CAD)

      Vol:
    E77-A No:3
      Page(s):
    492-501

    Genetic algorithms have been shown to be very useful in a variety of search and optimization problems. In this paper, we describe the implementation of genetic algorithms for channel routing problems and identify the key points which are essential to making full use of the population of potential solutions, that is one of the characteristics of genetic algorithms. Three efficient crossover techniques which can be divided further into 13 kinds of crossover operators have been compared. We also extend our previous work with ability to deal with dogleg case by simply splitting multi-terminal nets into a series of 2-terminal subnets. It routes the Deutsch's difficult example with 21 tracks without any detours.

  • Spatio-Temporal Prediction Based Algorithm for Parallel Improvement of HEVC

    Xiantao JIANG  Tian SONG  Takashi SHIMAMOTO  Wen SHI  Lisheng WANG  

     
    PAPER

      Vol:
    E98-A No:11
      Page(s):
    2229-2237

    The next generation high efficiency video coding (HEVC) standard achieves high performance by extending the encoding block to 64×64. There are some parallel tools to improve the efficiency for encoder and decoder. However, owing to the dependence of the current prediction block and surrounding block, parallel processing at CU level and Sub-CU level are hard to achieve. In this paper, focusing on the spatial motion vector prediction (SMVP) and temporal motion vector prediction (TMVP), parallel improvement for spatio-temporal prediction algorithms are presented, which can remove the dependency between prediction coding units and neighboring coding units. Using this proposal, it is convenient to process motion estimation in parallel, which is suitable for different parallel platforms such as multi-core platform, compute unified device architecture (CUDA) and so on. The simulation experiment results demonstrate that based on HM12.0 test model for different test sequences, the proposed algorithm can improve the advanced motion vector prediction with only 0.01% BD-rate increase that result is better than previous work, and the BDPSNR is almost the same as the HEVC reference software.

  • Hardware Oriented Low-Complexity Intra Coding Algorithm for SHVC

    Takafumi KATAYAMA  Tian SONG  Wen SHI  Gen FUJITA  Xiantao JIANG  Takashi SHIMAMOTO  

     
    PAPER-Digital Signal Processing

      Vol:
    E100-A No:12
      Page(s):
    2936-2947

    Scalable high efficiency video coding (SHVC) can provide variable video quality according to terminal devices. However, the computational complexity of SHVC is increased by introducing new techniques based on high efficiency video coding (HEVC). In this paper, a hardware oriented low complexity algorithm is proposed. The hardware oriented proposals have two key points. Firstly, the coding unit depth is determined by analyzing the boundary correlation between coding units before encoding process starts. Secondly, the redundant calculation of R-D optimization is reduced by adaptively using the information of the neighboring coding units and the co-located units in the base layer. The simulation results show that the proposed algorithm can achieve over 62% computation complexity reduction compared to the original SHM11.0. Compared with other related work, over 11% time saving have been achieved without PSNR loss. Furthermore, the proposed algorithm is hardware friendly which can be implemented in a small area.

  • A Modified Genetic Channel Router

    Akio SAKAMOTO  Xingzhao LIU  Takashi SHIMAMOTO  

     
    PAPER

      Vol:
    E77-A No:12
      Page(s):
    2076-2084

    Genetic algorithms have been shown to be very useful in a variety of search and optimization problems. In this paper, we propose a modified genetic channel router. We adopt the compatible crossover operator and newly designed compatible mutation operator in order to search solution space more effectively, where vertical constraints are integrated. By carefully selected fitness function forms and optimized genetic parameters, the current version speeds up benchmarks on average about 5.83 times faster than that of our previous version. Moreover the total convergence to optimal solutions for benchmarks can be always obtained.

  • Neural Computation for Channel Routing Using Hopfield Neural Network Model

    Takashi SHIMAMOTO  Akio SAKAMOTO  

     
    PAPER-VLSI Design Technology

      Vol:
    E72-E No:12
      Page(s):
    1360-1366

    A neural network model for solving channel routing problem is proposed and described. Channel routing problem is one of the most important and popular phases of computer aided design of VLSI chips. Since the problem is NP-complete, many heuristic algorithms with various routing conditions have been proposed for the last decade. Recently, J.J. Hopfield has demonstrated that a neural network can provide a heuristic technique for solving optimization problem. This paper describes how channel routing problem can be solved by a neural network model proposed by Hopfield. A brief summary of Hopfield neural network model, how to construct a neural network for solving channel routing problem, and results of digital computer simulation are described. Our results show that the neural network could provide good solutions of channel routing problem. For example, it computes a solution of the number of horizontal tracks 31 for the difficult example" and by using simple compaction algorithm the solution can be improved to 28, which is optimal within our channel routing strategy.