For the future medical diagnostics, high-sensitive, rapid, and cost effective biosensors to detect the biomarkers have been desired. In this study, the polymer-based two-dimensional photonic crystal (2D-PC) was fabricated using nanoimprint lithography (NIL) for biosensing application. In addition, for biosensing application, label-free detection of fibrinogen which is a biomarker to diagnose the chronic obstructive pulmonary disease (COPD) could be achieved using antigen-antibody reaction high-sensitively (detection limit: pg/ml order) and rapidly. Using this polymer-based 2D-PC, optical biosensor can be developed cost effectively. Furthermore, by using polymer as a base material for fabrication of 2D-PC, label-free detection of antigen-antibody reaction can be performed in visible region.

High-performance and low-cost sensors are critical devices for high-throughput analyses of bio-samples in medical diagnoses and life sciences. In this paper, we demonstrate photonic crystal nanolaser sensor, which detects the adsorption of biomolecules from the lasing wavelength shift. It is a promising device, which balances a high sensitivity, high resolution, small size, easy integration, simple setup and low cost. In particular with a nanoslot structure, it achieves a super-sensitivity in protein sensing whose detection limit is three orders of magnitude lower than that of standard surface-plasmon-resonance sensors. Our investigations indicate that the nanoslot acts as a protein condenser powered by the optical gradient force, which arises from the strong localization of laser mode in the nanoslot.

To reduce the manufacturing cost of SoCs with many embedded SRAMs, we propose a scheme to reduce the area per good die for the SoC memory built-in self-test (MBIST). We first propose BIST hardware overhead reduction by application of an encoder-based comparator. For the repair of a faulty SRAM module with 2-D redundancy, we propose spare assignement algorithm. Based on an existing range-cheking-first algorithm (RCFA), we propose assign-all-row-RCFA (A-RCFA) which assign unused spare rows to faulty ones, in order to suppress the degradation of repair rate due to compressed fail location information output from the encoder-based comparator. Then, considering that an SoC has many SRAM modules, we propose a heuristic algorithm based on iterative improvement algorithm (IIA), which determines whether each SRAM should have a spare row or not, in order to minimize area per a good die. Experimental results on practical scale benchmark SoCs with more than 1,000 SRAM modules indicate that encoder-based comparators reduce hardware overhead by about 50% compared to traditional ones, and that combining the IIA-based algorithm for determining redundancy architecture with the encoder-based comparator effectively reduces the area per good die.