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Makoto YOSHIDA Toshiro HIRAMOTO Tsuyoshi FUJIWARA Takashi HASHIMOTO Tetsuya MURAYA Shigeharu MURATA Kunihiko WATANABE Nobuo TAMBA Takahide IKEDA
A new BiCMOS process based on a high-speed bipolar process with 0.5 µm emitter width has been developed using a bonded SOI substrate. Double polysilicon bipolar transistors with the trench isolation, shallow junctions and the pedestal collector implantation provide a high cut-off frequency of 27 GHz. Stress induced device degradation is carefully examined and a low stress trench isolation process is proposed.