High-end graphic systems with 3 million pixels require 8-bit D/A converters with more than 300-MS/s conversion rate. Furthermore, D/A converters need to operate with low supply voltage when they are integrated with large-scale digital circuits on a harf-micron CMOS process. This paper describes a 350-MS/s 8-bit CMOS D/A converter with 3.3-V power supply. A current source circuit with a delayed driving scheme is developed. This driving scheme reduces a fluctuation of internal node voltage of the current source circuit and high-speed swiching is realized. In addition to this driving scheme, two stages of latches are inserted into matrix decoder for reducing glitch energy and for enhancing decoding speed. The D/A converter is fabricated in a 0.5-µm CMOS process with single poly-silicon layer and double aluminum layers. Its settling time is less than 2.4 ns and it successfully operates at 350 MS/s.

A current source with current switches (switched current source) is widely used in various analog ICs. One of its typical application is data converters. This paper describes an analysis of the transient behavior of a switched current source. The analysis has clarified conditions and causes of overshooting in the output waveform. The analysis also clarifies dependence of the settling time on parameters. The waveform heavily depends on time constant and initial charge at the internal node where current source and current switch are connected. They can cause the overshooting and limit the settling time. A phenomenon of acceleration of the settling time and an influence of the charge coupling through current switches are also discussed. A chart mentioned in this paper is useful for the initial design and the improvement of switched current sources.

Influence of the resistance of the ground line in D/A converter has been analyzed. The resistance produces a significant linearity error if a conventional switching sequence is used. The proposed new compensation technique named symmetrical switching reduces the error to 25 %.

It has become an important subject to realize a high-speed D/A converter with low supply voltage. This paper discusses a 10 bit 50 MS/s CMOS D/A converter with 2.7 V power supply. Reduction of the supply voltage is achieved by developing "saturation-linear" biasing technique in current sources. In this scheme, a grounded transistor in cascode configuration is biased in linear region. High conversion rate is obtained by driving this grounded transistor directly. A charging transistor is also introduced into the current source for accelerating the settling time. The D/A converter is fabricated in a 1 µm CMOS process without using optional process steps. It successfully operates at 50 MS/s with 2.7 V power supply. The circuit techniques discussed here can be easily introduced into half-micron D/A converters.