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Hideho ARAKIDA Masafumi TAKAHASHI Yoshiro TSUBOI Tsuyoshi NISHIKAWA Hideaki YAMAMOTO Toshihide FUJIYOSHI Yoshiyuki KITASHO Yasuyuki UEDA Tetsuya FUJITA
We present a single-chip MPEG-4 audiovisual LSI in a 0.13 µm CMOS, 5-layer metal technology with 16 Mbit embedded DRAM, which integrates four 16 bit RISC and dedicated hardware accelerators including a 5 GOPS post filtering unit. It consumes 160 mW at 125 MHz and dissipates 80 nA in the standby mode. The chip is the world first LSI handling MPEG-4 CIF video encoding at 15 frames/sec and audio/speech encoding simultaneously.