We present a single-chip MPEG-4 audiovisual LSI in a 0.13 µm CMOS, 5-layer metal technology with 16 Mbit embedded DRAM, which integrates four 16 bit RISC and dedicated hardware accelerators including a 5 GOPS post filtering unit. It consumes 160 mW at 125 MHz and dissipates 80 nA in the standby mode. The chip is the world first LSI handling MPEG-4 CIF video encoding at 15 frames/sec and audio/speech encoding simultaneously.

This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 µm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.