A novel ratio-oriented definition based on 2T2R (Two transistors & two phase change resistors) phase change memory (PCM) cell structure is proposed to gain a high density by multilevel storage. In this novel solution, no reference is needed and good robustness remains still as conventional 2T2R, which is crucial when feature size scales to nanometer technology node. A behavioral SPICE model together with a preliminary simulation proves the idea to be feasible, and further optimization has been carried out. In addition, based on the ratio-oriented definition, a simpler and faster Error Control Coding (ECC) can be realized with n-Error-detection feasible.

A novel 3D RRAM concept using a stackable multi-layer 1TXR memory cell structure is proposed. The access transistor is fabricated in silicon, which has excellent affinity to the standard CMOS process. Using an 8-layer metal of stacked 1TXR (X=64) as an example, the density is over 260% higher than that of the conventional single layer 1T1R structure. Further, a corresponding operation algorithm is put forward, which can inhibit effectively mis-write and mis-read caused by sneaking current and reduce power consumption.