A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell

Ji ZHANG; Yiqing DING; Xiaoyong XUE; Gang JIN; Yuxin WU; Yufeng XIE; Yinyin LIN

doi:10.1587/transele.E93.C.1692

A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell

Ji ZHANG, Yiqing DING, Xiaoyong XUE, Gang JIN, Yuxin WU, Yufeng XIE, Yinyin LIN

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A novel 3D RRAM concept using a stackable multi-layer 1TXR memory cell structure is proposed. The access transistor is fabricated in silicon, which has excellent affinity to the standard CMOS process. Using an 8-layer metal of stacked 1TXR (X=64) as an example, the density is over 260% higher than that of the conventional single layer 1T1R structure. Further, a corresponding operation algorithm is put forward, which can inhibit effectively mis-write and mis-read caused by sneaking current and reduce power consumption.

Publication: IEICE TRANSACTIONS on Electronics Vol.E93-C No.12 pp.1692-1699

Publication Date: 2010/12/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E93.C.1692

Type of Manuscript: PAPER

Category: Integrated Electronics

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Ji ZHANG, Yiqing DING, Xiaoyong XUE, Gang JIN, Yuxin WU, Yufeng XIE, Yinyin LIN, "A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell" in IEICE TRANSACTIONS on Electronics, vol. E93-C, no. 12, pp. 1692-1699, December 2010, doi: 10.1587/transele.E93.C.1692.
Abstract: A novel 3D RRAM concept using a stackable multi-layer 1TXR memory cell structure is proposed. The access transistor is fabricated in silicon, which has excellent affinity to the standard CMOS process. Using an 8-layer metal of stacked 1TXR (X=64) as an example, the density is over 260% higher than that of the conventional single layer 1T1R structure. Further, a corresponding operation algorithm is put forward, which can inhibit effectively mis-write and mis-read caused by sneaking current and reduce power consumption.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.1692/_p

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@ARTICLE{e93-c_12_1692,
author={Ji ZHANG, Yiqing DING, Xiaoyong XUE, Gang JIN, Yuxin WU, Yufeng XIE, Yinyin LIN, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell},
year={2010},
volume={E93-C},
number={12},
pages={1692-1699},
abstract={A novel 3D RRAM concept using a stackable multi-layer 1TXR memory cell structure is proposed. The access transistor is fabricated in silicon, which has excellent affinity to the standard CMOS process. Using an 8-layer metal of stacked 1TXR (X=64) as an example, the density is over 260% higher than that of the conventional single layer 1T1R structure. Further, a corresponding operation algorithm is put forward, which can inhibit effectively mis-write and mis-read caused by sneaking current and reduce power consumption.},
keywords={},
doi={10.1587/transele.E93.C.1692},
ISSN={1745-1353},
month={December},}

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TY - JOUR
TI - A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell
T2 - IEICE TRANSACTIONS on Electronics
SP - 1692
EP - 1699
AU - Ji ZHANG
AU - Yiqing DING
AU - Xiaoyong XUE
AU - Gang JIN
AU - Yuxin WU
AU - Yufeng XIE
AU - Yinyin LIN
PY - 2010
DO - 10.1587/transele.E93.C.1692
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2010
AB - A novel 3D RRAM concept using a stackable multi-layer 1TXR memory cell structure is proposed. The access transistor is fabricated in silicon, which has excellent affinity to the standard CMOS process. Using an 8-layer metal of stacked 1TXR (X=64) as an example, the density is over 260% higher than that of the conventional single layer 1T1R structure. Further, a corresponding operation algorithm is put forward, which can inhibit effectively mis-write and mis-read caused by sneaking current and reduce power consumption.
ER -