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[Author] Yohei YOSHIDA(2hit)

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  • Optical Properties of Bound Excitons and Biexcitons in GaN

    Yoichi YAMADA  Chiharu SASAKI  Yohei YOSHIDA  Satoshi KURAI  Tsunemasa TAGUCHI  Tomoya SUGAHARA  Katsushi NISHINO  Shiro SAKAI  

     
    INVITED PAPER

      Vol:
    E83-C No:4
      Page(s):
    605-611

    Excitonic optical properties of GaN homoepitaxial layers have been studied by means of magneto-luminescence and time-resolved luminescence spectroscopy. The luminescence lines due to the radiative recombination of excitons bound to neutral donors and acceptors have been measured under magnetic field up to 8 T, which was aligned perpendicular and parallel to the hexagonal c-axis. Under the magnetic field aligned perpendicular to the hexagonal c-axis, both the donor- and acceptor-bound-exciton lines clearly split into two components, which originated from the Zeeman splitting. The effective g-factors for both the donor- and acceptor-bound excitons were estimated to be 2.02 and 2.47, respectively. Under the magnetic field aligned parallel to the hexagonal c-axis, slight broadening of the bound-exciton lines was observed and the Zeeman splitting was too small to be detected. On the other hand, the diamagnetic shift for both the donor- and acceptor-bound-exciton luminescence lines was observed under the magnetic field aligned both perpendicular and parallel to the hexagonal c-axis. It was found that the diamagnetic shift of the donor-bound exciton was smaller than that of the acceptor-bound exciton. Furthermore, recombination dynamics of excitonic transitions was measured under high-density excitation. An excitation-density-dependent transition of the dominant radiative recombination process from donor-bound excitons to biexcitons was clearly observed in the temporal behavior. In addition, double-exponential decay of biexciton luminescence was observed, which is one of the characteristics of biexciton luminescence at high excitation densities.

  • A Hardware Accelerator for JavaTM Platforms on a 130-nm Embedded Processor Core

    Tetsuya YAMADA  Naohiko IRIE  Takanobu TSUNODA  Takahiro IRITA  Kenji KITAGAWA  Ryohei YOSHIDA  Keisuke TOYAMA  Motoaki SATOYAMA  

     
    PAPER-Integrated Electronics

      Vol:
    E90-C No:2
      Page(s):
    523-530

    We have developed a hardware accelerator for Java platforms, integrated on a SuperH microprocessor core, using a 130-nm CMOS process. The Java accelerator, a bytecode translation unit (BTU), is tightly coupled with the CPU to share resources. The BTU supports 159 basic bytecodes and 5 or 6 optional bytecodes. It supports both connected device configuration (CDC) 1.0 and connected limited device configuration (CLDC) 1.0.4 technologies. The BTU corresponds to the dual-issued superscalar CPU and applies a new method, control-sharing. With this method, the BTU always grasps the pipeline status of the CPU, and the Java program is processed by both the BTU and the CPU. To implement this method, we developed some acceleration techniques: fast branch requests, enhanced CPU instructions, Java runtime exception detection hardware, and fewer overhead cycles of handover between the BTU and the CPU. In particular, the BTU can detect Java runtime exceptions in parallel with other processing, such as an array access. With previous methods, there is a disadvantage in that CPU efficiency decreases for Java-specific processing, such as array index bounds checking. The sample chip was fabricated in Renesas 130-nm, five-layer Cu, dual-vth low-power CMOS technology. The chip runs at 216 MHz and 1.2 V. The BTU has 75 kG. The benchmark on an evaluation board showed 6.55 embedded caffeine marks (ECM)/MHz on the CLDC 1.0.4 configuration, a tenfold speed increase without the BTU for roughly the same power consumption. In other words, power savings of 90 percent with the same performance were achieved.