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[Author] Yoichi MAKINO(2hit)

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  • DC and Microwave Performances of (InAs)(GaAs) Short Period Superlattice Channel 2DEGFET's

    Kazuhiko ONDA  Hideo TOYOSHIMA  Masaaki KUZUHARA  Norihiko SAMOTO  Emiko MIZUKI  Yoichi MAKINO  Tomohiro ITOH  

     
    PAPER

      Vol:
    E74-C No:12
      Page(s):
    4114-4118

    The (InAs)1(GaAs)n short period superlattice (SPS) channel 2DEGFET's with 0.2 µm T-Shaped gates have been successfully fabricated on a GaAs substrate for the first time, and DC and RF performances of the superlattice channel devices have been investigated. Compared to conventional InGaAs alloy channel devices, excellent results in both DC and RF characteristics have been obtained for the SPS channel devices. The dependence of the layer index n for (InAs)1(GaAs)n on device performances has been also investigated. The (InAs)1(GaAs)4 channel samples have shown higher cut-off frequencies as well as superior noise performances compared to those for the (InAs)1(GaAs)5 channel samples. The best noise figure of 0.55 dB with an associated gain of 11.26 dB has been obtained at 12 GHz. The superior performances obtained are due to the improved electron transport properties of (InAs)1(GaAs)n SPS compared to those of InGaAs alloy. These results indicate a great potential of SPS channel structures for high frequency low noise device applications.

  • High Performance HJFET MMIC with Embedded Gate Technology for Microwave and Millimeter-Wave IC's Using EB Lithography (EMMIE)

    Akio WAKEJIMA  Yoichi MAKINO  Katsumi YAMANOGUCHI  Norihiko SAMOTO  

     
    PAPER-Low Power-Consumption RF ICs

      Vol:
    E82-C No:11
      Page(s):
    1977-1981

    A high gain AlGaAs/InGaAs HJFET has been developed with Embedded gate technology for Microwave and Millimeter-wave IC's using EB lithography (EMMIE). EMMIE consists of a direct SiO2 opening by two-step dry-etching with a chemically amplified resist mask. 0.14 µm gate patterns delineated on 4-inch wafers exhibited a small deviation of 10 nm in Lg and a Vth standard deviation of 55 mV. The optimum distance between the top of the gate and the recess surface (hg) was determined using a two-dimensional device simulator in order to investigate the effect of fringing gate to drain capacitance on the RF gain performance. The fabricated one-stage HJFET MMIC amplifier exhibited extremely high gain performance of 12.4 dB at 76 GHz.