This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.