The search functionality is under construction.

The search functionality is under construction.

This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an *RLC* series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.

- Publication
- IEICE TRANSACTIONS on Communications Vol.E84-B No.11 pp.3041-3049

- Publication Date
- 2001/11/01

- Publicized

- Online ISSN

- DOI

- Type of Manuscript
- PAPER

- Category
- Electromagnetic Compatibility(EMC)

The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.

Copy

Yukihiro FUKUMOTO, Yasuo TAKAHATA, Osami WADA, Yoshitaka TOYOTA, Takuya MIYASHITA, Ryuji KOGA, "Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits" in IEICE TRANSACTIONS on Communications,
vol. E84-B, no. 11, pp. 3041-3049, November 2001, doi: .

Abstract: This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an *RLC* series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.

URL: https://global.ieice.org/en_transactions/communications/10.1587/e84-b_11_3041/_p

Copy

@ARTICLE{e84-b_11_3041,

author={Yukihiro FUKUMOTO, Yasuo TAKAHATA, Osami WADA, Yoshitaka TOYOTA, Takuya MIYASHITA, Ryuji KOGA, },

journal={IEICE TRANSACTIONS on Communications},

title={Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits},

year={2001},

volume={E84-B},

number={11},

pages={3041-3049},

abstract={This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an *RLC* series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.},

keywords={},

doi={},

ISSN={},

month={November},}

Copy

TY - JOUR

TI - Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits

T2 - IEICE TRANSACTIONS on Communications

SP - 3041

EP - 3049

AU - Yukihiro FUKUMOTO

AU - Yasuo TAKAHATA

AU - Osami WADA

AU - Yoshitaka TOYOTA

AU - Takuya MIYASHITA

AU - Ryuji KOGA

PY - 2001

DO -

JO - IEICE TRANSACTIONS on Communications

SN -

VL - E84-B

IS - 11

JA - IEICE TRANSACTIONS on Communications

Y1 - November 2001

AB - This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an *RLC* series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.

ER -