This paper presents a multi-matcher on-line signature verification system which fuses the verification scores in pen-position parameter and pen-movement angle one at total decision. Features of pen-position and pen-movement angle are extracted by the sub-band decomposition using the Discrete Wavelet Transform (DWT). In the pen-position, high frequency sub-band signals are considered as individual features to enhance the difference between a genuine signature and its forgery. On the other hand, low frequency sub-band signals are utilized as features for suppressing the intra-class variation in the pen-movement angle. Verification is achieved by the adaptive signal processing using the extracted features. Verification scores in the pen-position and the pen-movement angle are integrated by using a weighted sum rule to make total decision. Experimental results show that the fusion of pen-position and pen-movement angle can improve verification performance.

This paper first presents the performance analysis of the NACF algorithm. The results show the possibility of the degradation in the convergence speed. To improve the convergence speed, the bias term is introduced into the NACF algorithm and its efficiency is investigated through the computer simulations.

In on-line signature verification, complexity of signature shape can influence the value of the optimal threshold for individual signatures. Writer-dependent threshold selection has been proposed but it requires forgery data. It is not easy to collect such forgery data in practical applications. Therefore, some threshold equalization method using only genuine data is needed. In this letter, we propose three different threshold equalization methods based on the complexity of signature. Their effectiveness is confirmed in experiments using a multi-matcher DWT on-line signature verification system.

Recently, in the modem, the spread spectrum communication system and the software radio, Digital Signal Processor type Squaring Loop (DSP-squaring-loop) is employed in the demodulation of Binary Phase Shift Keying (BPSK) signal. The DSP-squaring-loop extracts the carrier signal that is used for the coherent detection. However, in case the Signal to Noise Ratio (SNR) is low, the DSP-Phase Locked Loop (DSP-PLL) can not pull in the frequency offset and the phase offset. In this paper, we propose a DSP-squaring-loop that is robust against noise and which uses the adaptive notch filter type frequency estimator and the adaptive Band Pass Filter (BPF). The proposed method can extract the carrier signal in the low SNR environment. The effectiveness of the proposed method is confirmed by the computer simulation results.

In this paper, we propose a new structure of the frequency domain adaptive filter (FDAF). The proposed structure is based on the modified DFT pair which consists of the FIR filters, so that un-delayed output signal can be obtained with stable convergence and without accumulated error which are problems for the conventional FDAFs. The convergence performance of the proposed FDAF is examined through the computer simulations in the adaptive line enhancer (ALE) comparing with the conventional FDAF and the DCT domain adaptive filter. Furthermore, in order to improve the error performance of the FDAF, we propose a composite algorithm which consists of the normalized step size algorithm for fast convergence and the variable step size one for small estimation error. The advantage of the proposed algorithm is also confirmed through simulations in the ALE. Finally, we propose a reduction method of the computational complexity of the proposed FDAF. The proposed method is to utilize a part of the FFT flow-graph, so that the computational complexity is reduced to O(N log N).

A technique that uses a linear prediction error filter (LPEF) and an adaptive digital filter (ADF) to achieve noise reduction in a speech degraded by additive background noise is proposed. It is known that the coefficients of the LPEF converge such that the prediction error signal becomes white. Since a voiced speech can be represented as the stationary periodic signal over a short interval of time, most of voiced speech cannot be included in the prediction error signal of the LPEF. On the other hand, when the input signal of the LPEF is a background noise, the prediction error signal becomes white. Assuming that the background noise is represented as generate by exciting a linear system with a white noise, then we can reconstruct the background noise from the prediction error signal by estimating the transfer function of noise generation system. This estimation is performed by the ADF which is used as system identification. Noise reduction is achieved by subtracting the noise reconstructed by the ADF from the speech degraded by additive background noise.

This letter presents a technique to cancel the parasitic effects of operational amplifier (op amp) in active filter design. To minimize the effects, an op amp model considering the parasitics (i.e. both parasitic poles and zeros) is utilized. It is shown that undesirable factors in the transfer function due to the parasitics can be canceled well by predistorting the passive element values of the circuit. As an example, an active-R highpass filter is evaluated both theoretically and numerically. In this way, the proposed technique can be effectively incorporated into the design of active filters.

In order to reduce the computational complexity of the DWT domain on-line signature verification, the authors propose to utilize the pen-movement vector as an input parameter. Experimental results indicate that the verification rate obtained using the pen-movement vector parameter is equivalent to that obtained by the conventional method, although the computational complexity of the proposed method is approximately half that of the conventional method.

This paper treats the synthesis of immittance floatator using nullors. Eight sets of circuit equations for realizing immittance floatators and their nullor (nullator-norator) representations are given. By replacing nullors with active elements such as biporlar junction transistors (BJTs), current conveyors (CCIIs), operational amplifiers (OAs) and operational transconductance amplifiers (OTAs), the immittance floatators can be derived. The development is important because it enables one to convert the present wealth of knowledge concerning grounded immittance simulation networks into floating immittance simulation networks. Using immittance floatators, we can obtain not only the floating form of 1-port but also that of 2-port networks. Novel circuits use solely minus-type norators. Using one-type (minus- or plus-type) norators greatly simplifies the simulation circuit. In the case of an immittance floatator using CCIIs as the active elements, the effects of nonideal CCIIs and sensitivities are given. Many circuits can be systematically derived using nullor technique.

This paper presents a new Adaptive Convergence Factor (ACF) algorithm without the damping parameter adjustment acoording to the input signal and/or the composition of the filter system. The damping parameter in the ACF algorithms has great influence on the convergence characteristics. In order to examine the relation between the damping parameter and the convergence characteristics, the normalization which is realized by the related signal terms divided by each maximum value is introduced into the ACF algorithm. The normalized algorithm is applied to the modeling of unknown time-variable systems which makes it possible to examine the relation between the parameters and the misadjustment in the adaptive algorithms. Considering the experimental and theoretical results, the optimum value of the damping parameter can be defined as the minimum value where the total misadjustment becomes minimum. To keep the damping parameter optimum in any conditions, the new ACF algorithm is proposed by improving the invariability of the damping parameter in the normalized algorithm. The algorithm is investigated by the computer simulations in the modeling of unknown time-variable systems and the system indentification. The results of simulations show that the proposed algorithm needs no adjustment of the optimum damping parameter and brings the stable convergence characteristics even if the filter system is changed.

The speech noise reduction system based on the frequency domain adaptive line enhancer using a windowed modified DFT (MDFT) pair is presented. The adaptive line enhancer (ALE) is effective for extracting sinusoidal signals blurred by a broadband noise. In addition, it utilizes only one microphone. Therefore, it is suitable for the realization of speech noise reduction in portable electronic devices. In the ALE, an input signal is generated by delaying a desired signal using the decorrelation parameter, which makes the noise in the input signal decorrelated with that in the desired one. In the present paper, we propose to set decorrelation parameters in the frequency domain and adjust them to optimal values according to the relationship between speech and noise. Such frequency domain decorrelation parameters enable the reduction of the computational complexity of the proposed system. Also, we introduce the window function into MDFT for suppressing spectral leakage. The performance of the proposed noise reduction system is examined through computer simulations.

A dual transformation incorporating the frequency-dependent scaling factor with the impedance dimension is proposed to synthesize the current-mode counterpart of a voltage-mode original. A general class of current-mode active-RC biquadratic filters and a switched-capacitor low-pass biquad are derived to demonstrate the synthesis procedure. Their simulation and test results show that the current transfer functions are the same as the voltage transfer functions of the originals, and thus confirm the validity of the procedure. The dual trasformation described herein is general in that with the scaling factor chosen appropriately it can meet a wide variety of circuit transformation, and thus useful also for circuit classification and identification.

This paper introduces current-mode biquad using multiple current output operational transconductance amplifiers (OTAs) and grounded capacitors. The circuit configuration is obtained from a second-order integrator loop structure with loss-less and lossy integrators. The proposed circuit can realize low-pass, band-pass, high-pass, band-stop and all-pass transfer functions by suitably choosing the input and output terminals. And the circuit characteristics can be electronically tuned through adjusting the transconductance gains of OTAs. It is also made clear that the proposed circuit has very low sensitivities with respect to the circuit active and passive elements. An example is given together with simulated results by PSpice.

In this paper, we propose a speedup method of frequency switching time in the phase locked loop (PLL) frequency synthesizer using the target frequency detector (TFD). The TFD detects the time Ta for any channels where the output of the PLL frequency synthesizer reaches the target frequency for the first time. At Ta, the programmable divider, the reference divider and the phase comparator are reset, and the phase of the PLL frequency synthesizer is initialized and the phase synchronization is achieved. In the proposed method, since the ringing in the transient state does not occur, the output of the PLL frequency synthesizer converges to the target frequency at Ta and the frequency switching time is speeded up. The effectiveness of the proposed method will be confirmed by experimental results.

The lock-up time of a PLL frequency synthesizer mainly depends on the total loop gain. Since the gain of the conventional phase detector is constant, it is difficult to improve the lock-up time by the phase detector. In this paper, we reconsider the operation of the phase detector and propose the PLL frequency synthesizer with multi-phase detector in which the gain of phase detector is increased by using four stage phase detectors and charge pumps. Then, a higher speed lock-up time and good spurious characteristics can be achieved.

Newton based adaptive algorithms are among the algorithms which are known to exhibit a higher convergence speed in comparison to the least mean square (LMS) algorithms. In this paper we propose a simplified Newton based adaptive algorithm for an adaptive infinite impulse response (IIR) filter implemented using cascades of second order allpass filters and a finite impulse response (FIR) filter. The proposed Newton based algorithm avoids the complexity that may arise in the direct differentiation of the mean square error. The analysis and simulation results presented for the algorithm, show that the property of convergence of the poles of the IIR ADF to those of the unknown system will be maintained for both white and colored input signal. Computer simulation results confirm an increase in convergence speed in comparison to the LMS algorithm.

In this paper we propose a parallel composition based adaptive notch filter for eliminating sinusoidal signals whose frequencies are unknown. The proposed filter which is implemented using second order all-pass filter and a band-pass filter can achieve high convergence speed by using the output of an additional band-pass filter to update the coefficients of the notch filter. The high convergence speed of the proposed notch filter is obtained by reducing an effect that an updating term of coefficient for adaptation of a notch filter significantly increases when the notch frequency approaches the sinusoidal frequency. In this paper, we analyze such effect obtained by the additional band-pass filter. We also present an analysis of a convergence performance of cascaded system of the proposed notch filter for eliminating multiple sinusoids. Simulation results have shown the effectiveness of the proposed adaptive notch filter.

This paper introduces a way to realize high-pass, band-stop and all-pass transfer functions using two-integrator loop structure consisting of loss-less and lossy integrators. The basic circuit configuration is constructed with five Operational Transconductance Amplifiers (OTAs) and two grounded capacitors. It is shown that the circuit can realize their circuit transfer functions by choosing the input terminals, and that the circuit parameters can also be independently set by the transconductance gains with the proportional block. Although the basic circuit configuration has been known, it seems that the feature for realizing the high-pass, the band-stop and the all-pass transfer functions makes the structure more attractive and useful. An example is given together with simulated results by PSPICE.

An adaptive infinite impulse response (IIR) filter implemented using an allpass and a minimum phase system has an advantage of its poles converging to the poles of the unknown system when the input is a white signal. However, when the input signal is colored, convergence speed deteriorates considerably, even to the point of lack of convergence for certain colored signals. Furthermore with a colored input signal, there is no guarantee that the poles of the adaptive digital filter (ADF) will converge to the poles of the unknown system. In this paper we propose a method which uses a linear predictor filter to whiten the input signal so as to improve the convergence characteristic. Computer simulation results confirm the increase in convergence speed and the convergence of the poles of the ADF to the poles of the unknown system even when the input is a colored signal.

In this paper, in order to achieve the low power consumption of programmable divider in a PLL frequency synthesizer, we propose a new prescaler method for low power consumption. A fixed prescaler is inserted in front of the (N +1/2) programmable divider which is designed based on the new principle. The divider ratio in the loop does not vary at all even if such a prescaler is utilized. Then the permissible delay periods of a programmable divider can be extended to two times as long as the conventional method, and the low power consumption and low cost in a PLL frequency synthesizer have been achieved.