The existing research on Amdahl's law is limited to multi/many-core processors, and cannot be applied to the important parallel processing architecture of coarse-grained reconfigurable arrays. This paper studies the relation between the multi-level parallelism of block cipher algorithms and the architectural characteristics of coarse-grain reconfigurable arrays. We introduce the key variables that affect the performance of reconfigurable arrays, such as communication overhead and configuration overhead, into Amdahl's law. On this basis, we propose a performance model for coarse-grain reconfigurable block cipher array (CGRBA) based on the extended Amdahl's law. In addition, this paper establishes the optimal integer nonlinear programming model, which can provide a parameter reference for the architecture design of CGRBA. The experimental results show that: (1) reducing the communication workload ratio and increasing the number of configuration pages reasonably can significantly improve the algorithm performance on CGRBA; (2) the communication workload ratio has a linear effect on the execution time.

In this paper, we develop asymptotic analysis and simulation models to better understand the characteristics of performance and energy consumption in a multi-core processor design in which dynamic voltage scaling is used. Our asymptotic model is derived using Amdahl's law, Rent's rule and power equations to derive the optimum number of cores and their voltage levels. Our model can predict the possible impact of different multi-core processor configurations on the performance and energy consumption for given workload characteristics (e.g. available parallelism) and process technology parameters (e.g. ratios of dynamic and static energies to total energy). Through the asymptotic analysis and optimization based on the models, we can observe an asymptotic relationship between design parameters such as "the number of cores," "core size" and "voltage scaling strategies" of a multi-core architecture with regards to performance and energy consumption at an initial phase of the design.