Hitoshi SUMIDA Atsuo HIRABAYASHI
The static and dynamic characteristics of the lateral IGBT on the SOI film when the collector voltage of the IGBT is applied to the substrate are invesigated for its application to the high side switch. The measurements on the blocking capability and the switching characteristics under an inductive load are carried out with varying the thickness of the SOI film. The 260 V IGBT can be fabricated on the 5 µm thick SOI film without the special device structure. It is confirmed that the switching speed depends strongly on the SOI film thickness, not on the substrate bias. The dynamic latch-up current during the turn-off transient increases with the decrease in the SOI film thickness. This is caused by the large transient substrate current. This paper exhibits that applying the collector voltage of the IGBT to the substrate makes it possible to improve the characteristics of the IGBT on the thin SOI film.
Katsumi TSUNENO Hisako SATO Hiroo MASUDA
This paper describes modeling and simulation of submicron NMOSFET current drive focusing on carrier velocity-saturation effects. A new simple analytical model is proposed which predicts a significant degradation of drain current in sub- and quarter-micron NMOSFET's. Numerical two-dimensional simulations clarify that the degradation is namely caused by high lateral electric field along the channel, which leads to deep velocity-saturation of channel electrons even at the source end. Experimental data of NMOSFET's, with gate oxide thickness (Tox) of 9-20 nm and effective channel lengths (Leff) of 0.35-3.0 µm, show good agreement with the proposed model. It is found that the maximum drain current at the supply voltage of Vdd=3.3 V is predicted to be proportional to Leff0.54 in submicron NMOSFET's, and this is verified with experiments.
Expressions for electromagnetic fields generated by vertical and horizontal electric dipoles located in the air or in a lossy half-space near its boundary with air are obtained from Hertz vectors by the method of operators under the condition |n|3
Hiroshi UEDA Yoichiro ANZAI Masaya OHTA Shojiro YONEDA Akio OGIHARA
In this paper, two models for associative memory based on a measure of manhattan length are proposed. First, we propose the two-layered model which has an advantage to its implementation by using PDN. We also refer to the way to improve the recalling ability of this model against noisy input patterns. Secondly, we propose the other model which always recalls the nearest memory pattern in a measure of manhattan length by lateral inhibition. Even if a noise of input pattern is so large that the first model can not recall, this model can recall correctly against such a noisy pattern. We also confirm the performance of the two models by computer simulations.
Naoshi HIGAKI Tetsu FUKANO Atsushi FUKURODA Toshihiro SUGII Yoshihiro ARIMOTO Takashi ITO
We fabricated a 4 GHz thin-base (120 nm) lateral bipolar transistor on bonded SOI by applying our sidewall self-aligning base process. By applying this device to BiCMOS circuits, bipolar transistor base junction capacitance, and MOSFET source and drain capacitance were very small. Furthermore, MOSFET and bipolar transistors are completely isolated from each other. Thus, it is easy to optimize MOS and bipolar processes, and provide protection from latch-up problems and soft errors caused by α-particles. In this paper, we describe device characteristics and discuss the crystal quality degradation introduced by ion implantation, and two dimensional effects of base diffusion capacitance.
The globalization of business where single products and services are designed, developed, and manufactured in many different countries signals a significant need for cost-effective and reliable information movement and management capabilities. Similarly, consumers are seeking technologies which will allow them to visit the Smithsonian, scan a book in the Oxford Library, and interview a Japanese monk for a school report, all from the comfort of home. A necessary ingredient for realizing this global society is a strong telecommunications infrastructure. Our paper describes some of the customer needs and technology advances that are causing a revolution in planning global telecommunications networks. We present a new telecommunications paradigm and study its impact in two key areas: multi-country network routing at both the traffic and facility levels, and global network robustness.
Tsuyoshi ISSHIKI Hiroaki KUNIEDA Mineo KANEKO
This paper proposes a designing algorithm for quadrilateral recursive filters which consist of four quarter-plane filters in the four quadrants. This can realize a perfect zero-phase filtering which is essential for image processing. Furthermore, several parallel processing algorithms capable of performing under very high parallel efficiency are developed on line-connected and mesh-connected processor arrays. By these proposals, the advantage of two-dimensional non-causal zero-phase recursive digital filters is made clear.