The paper presents the analysis, design and performance of PCB (Printed Circuit Board)-based cross-coupled differential VCOs using a novel LC-tank. As compared with the conventional LC-tank, a novel LC-tank is comprised of only chip inductors and thus has an advantage in providing a higher cutoff frequency. This feature attributes to the use of the parasitic elements of the chip inductors and capacitors. The cutoff frequencies were compared for both LC-tanks by calculation, simulation and measurement. Then the traditional cross-coupled differential oscillators having both LC-tanks were designed, fabricated and performed by using 0.35µm SiGe HBTs and 1005-type chip devices. The implemented oscillator using a novel LC-tank has shown a 0.12GHz higher oscillation frequency, while phase noise characteristics were almost the same. In addition, the cross-coupled differential oscillator utilizes a series RL circuit in order to suppress the concurrent oscillations. The implemented cross-coupled differential VCO employing Si varactor diodes with a capacitance ratio of 2.5 to 1 has achieved a tuning frequency of 0.92 to 1.28GHz, an output power greater than -13.5dBm, a consumed power less than 8.7mW and a phase noise at 100kHz offset in a range from -104 to -100dBc/Hz.

A novel divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator embedded with a push-push signal generator and two injection MOSFETs for coupling the injection signal into the resonator. The ILFD uses the linear mixer to extend the locking range and has been implemented in a standard 0.18 µm CMOS process. The core power consumption of the ILFD core is 3.12 mW. The divider's free-running frequency is tunable from 4.26 GHz to 4.9 GHz by tuning the varactor's control bias, and at the incident power of 0 dBm the locking range of the ILFD used as a divide-by-3 divider is 1.5 GHz, from 12.5 GHz to 14.0 GHz.

A dual band 0.18 µm CMOS LC-tank injection locked frequency divider (ILFD) is proposed. The ILFD circuit is realized with a cross-coupled pMOS LC-tank oscillator with an inductor switch for frequency band selection. The self-oscillating VCO is injection-locked by nth-harmonic input to obtain the division factor of n. The division ratio of 1, 2, and 3 has been found for the proposed ILFD. Measurement results show that at the supply voltage of 1.1 V, the free-running frequency is from 2.28(3.09) GHz to 2.78(3.72) GHz for the low- (high-) frequency band. The power consumption of the ILFD core is 3.7 mW (6.2 mW) at low (high) band. The total area including the output buffer and the pads is 0.8410.764 mm2.

An impedance-isolation technique is proposed for on-chip ESD protection design for radio-frequency (RF) integrated circuits (ICs), which has been successfully verified in a 0.25-µm CMOS process with thick top-layer metal. With the resonance of LC-tank at the operating frequency of the RF circuit, the impedance (especially, the parasitic capacitance) of the ESD protection devices can be isolated from the RF input node of low-noise amplifier (LNA). Therefore, the LNA can be co-designed with the proposed impedance-isolation technique to simultaneously achieve excellent RF performance and high ESD robustness. The power gain (S21-parameter) and noise figure of the ESD protection circuits with the proposed impedance-isolation technique have been experimentally measured and compared to those with the conventional double-diodes ESD protection scheme. The proposed impedance-isolation technique had been demonstrated to be suitable for on-chip ESD protection design for RF ICs.